ICS650-21

SYSTEM PERIPHERAL CLOCK SOURCE

CLOCK SYNTHESIZER

IDT™ / ICS™ SYSTEM PERIPHERAL CLOCK SOURCE

2

ICS650-21

REV J 051310

Pin Assignment

USB Clock (MHz)

Processor Clock (MHz)

Audio Clock (MHz)

0 = connect directly to ground

1 = connect directly to VDD

M = leave unconnected (floating)

Pin Descriptions

USEL

UCLK

012

M24

148

13

4

12

5

11

VDD

8

9

10

VDD

20M

OFF/14.318M

OE

ACLK

PCLK1

17

16

25M

3

X1/ICLK

VDD

PCLK3

18

PCLK2

1

USEL

X2

PSEL0

20

PSEL1

19

14

2

7

GND

UCLK

ASEL

GND

15

6

20-pin (150 mil) SSOP

PSEL1

PSEL0

PCLK1

PCLK2, 3

00

25

50

0M

TEST MODE

01

TEST MODE

M0

40

80

M

M

33.3333

66.6667

M1

20

40

1

0

20

33.3333

1

M

20

66.6667

1

1

50

100

ASEL

ACLK

0

49.152

M

24.576

1

14.318

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

USEL

Input

UCLK select pin. Determines frequency of USB clock per table above.

2

X2

XO

Crystal connection. Connect to parallel mode 25 MHz crystal. Leave open

for clock.

3

X1/ICLK

XI

Crystal connection. Connect to parallel mode 25 MHz crystal or clock.

4

VDD

Power

Connect to VDD. Must be same value as other VDD. Decouple with pin 6.

5

VDD

Power

Connect to VDD. Must be same value as other VDD.

6

GND

Power

Connect to ground.

7

UCLK

Output

USB clock output per table above.

8

20M

Output

Fixed 20 MHz output for Ethernet.

9

ACLK

Output

AC97 audio clock output per table above.

10

25M

Output

Fixed 25 MHz reference output for Fast Ethernet.

11

OE

Input

Output enable. Tri-states all outputs when low.

12

PCLK1

Output

PCLK output number 1 per table above.