AM29BDS643G datasheet(27/49 Pages) SPANSION

27 / 49 page

May 8, 2006 25692A2

Am29BDS643G

D A TA

SH EE T

Table 10.

Command Definitions

Legend:

X = Don’t care

RA = Address of the memory location to be read.

RD = Data read from location RA during read operation.

PA = Address of the memory location to be programmed. Addresses

latch on the falling edge of the WE# or CE# pulse, whichever happens

later.

PD = Data to be programmed at location PA. Data latches on the rising

edge of WE# or CE# pulse, whichever happens first.

SA = Address of the sector to be verified (in autoselect mode) or

erased. Address bits A21–A12 uniquely select any sector.

BA = Address of the bank (A21, A20) that is being switched to

autoselect mode, is in bypass mode, or is being erased.

SLA = Address of the sector to be locked. Set sector address (SA) and

either A6 = 1 for unlocked or A6 = 0 for locked.

CR = Configuration Register set by address bits A16–A12.

Notes:

See Table 1 for description of bus operations.

All values are in hexadecimal.

Except for the read cycle and the fourth cycle of the autoselect

command sequence, all bus cycles are write cycles.

Data bits DQ15–DQ8 are don’t care in command sequences,

except for RD and PD.

Unless otherwise noted, address bits A21–A12 are don’t cares.

No unlock or command cycles required when bank is reading

array data.

The Reset command is required to return to reading array data

(or to the erase-suspend-read mode if previously in Erase

Suspend) when a bank is in the autoselect mode, or if DQ5 goes

high (while the bank is providing status information).

The fourth cycle of the autoselect command sequence is a read

cycle. The system must read device IDs across the 4th, 5th, and

6th cycles, The system must provide the bank address. See the

Autoselect Command Sequence section for more information.

The data is 0000h for an unlocked sector and 0001h for a locked

sector

10. The data is 0043h for handshaking enabled.

11. The Unlock Bypass command sequence is required prior to this

command sequence.

12. The Unlock Bypass Reset command is required to return to

reading array data when the bank is in the unlock bypass mode.

13. The system may read and program in non-erasing sectors, or

enter the autoselect mode, when in the Erase Suspend mode.

The Erase Suspend command is valid only during a sector erase

operation, and requires the bank address.

14. The Erase Resume command is valid only during the Erase

Suspend mode, and requires the bank address.

15. The addresses in the third cycle must contain, on A12–A16, the

additional wait counts to be set. See “Set Configuration Register

Command Sequence”.

16. Command is valid when device is ready to read array data or

when device is in autoselect moe.

Command Sequence

(Note 1)

Bus Cycles (Notes 2–5)

First

Second

Third

Fourth

Fifth

Sixth

Addr Data Addr Data

Addr

Data

Addr

Data

Addr Data Addr Data

Asynchronous Read (Note 6)

Reset (Note 7)

XXX

Manufacturer ID

555

2AA

(BA)555

(BA)X00

0001

Device ID

555

2AA

(BA)555

(BA)X01

227E

(BA)

X0E

2202

(BA)

X0F

2200

Sector Lock Verify (Note 9)

555

2AA

(SA)555

(SA)X02 0000 0001

Handshaking Option (Note 10)

555

2AA

(BA)555

(BA)X03 0042 0043

Program

555

2AA

555

Data

Unlock Bypass

555

2AA

555

Unlock Bypass Program (Note 11)

XXX

Unlock Bypass Reset (Note 12)

XXX

Chip Erase

555

2AA

555

2AA

555

Sector Erase

555

2AA

555

2AA

Erase Suspend (Note 13)

Erase Resume (Note 14)

Sector Lock/Unlock

XXX

SLA

Set Configuration Register (Note 15)

555

2AA

(CR)555

Enable PS Mode

555

2AA

555

CFI Query (Note 16)

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