ADA4922-1

Rev. 0 | Page 15 of 20

A more detailed view of the amplifier is shown in Figure 45.

Each amplifier is a 2-stage design that uses an input H-Bridge

followed by a rail-to-rail output stage (see Figure 46).

The architecture used in the ADA4922-1 results in excellent

SNR and distortion performance when compared to other

differential amplifiers.

MIRROR

C

OUTPUT

STAGE

MIRROR

INN

OUT

INP

I

I

I

I

One of the more subtle points of operation arises when the two

amplifiers are used to generate the differential outputs. Because

the differential outputs are derived from a follower amplifier

and an inverting amplifier, they have different noise gains and,

therefore, different closed-loop bandwidths. For frequencies up

to 1 MHz, the bandwidth difference between outputs causes

little difference in the overall differential output performance.

However, because the bandwidth is the sum of both amplifiers,

the 3 dB point of the inverting amplifier defines the overall

differential 3 dB corner (see Figure 48).

0

1

10k

100M

FREQUENCY (Hz)

–2

–4

–6

7

5

3

1M

100k

10M

DIFFERENTIAL OUTPUT

OUT+

OUT–

Figure 45. Internal Amplifier Architecture

MIRROR

MIRROR

INTERNAL

REF

OUT

IN

I

I

I

I

Figure 46. Output Stage Architecture

Figure 48. Closed-Loop AC Gain (Differential Outputs)

Figure 47 illustrates the open-loop gain and phase relationships

of each amplifier in the ADA4922-1.

Small delay and gain errors exist between the two outputs

because the inverting output is derived from the noninverting

output through an inverting amplifier. The gain error is due to

imperfect matching of the inverting amplifier gain and feedback

resistors, as well as differences in the transfer functions of the

two amplifiers, as illustrated in Figure 48. The delay error is due

to the delay through the inverting amplifier relative to the

noninverting amplifier output. The delay produces a reduction

in differential gain because the two outputs are not exactly 180°

out of phase. Both of these errors combine to produce an overall

gain error because the outputs are completely balanced. This

error is very small at the frequencies involved in most

ADA4922-1 applications.

125

–125

–100

–75

–50

–25

100

1k

10k

100M

FREQUENCY (Hz)

75

100

50

25

0

1M

100k

10M

GAIN

PHASE

Figure 47. Amplifier Gain/Phase Relationship