ADE7752B datasheet(22/27 Pages) AD

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ADE7752B

Preliminary Technical Data

Rev. PrA | Page 22 of 27

TRANSFER FUNCTION

FREQUENCY OUTPUTS F1 AND F2

The ADE7752B calculates the product of six voltage signals (on

current channel and voltage channel) and then low-pass filters

this product to extract active power information. This active

power information is then converted to a frequency. The

frequency information is output on F1 and F2 in the form of

active high pulses. The pulse rate at these outputs is relatively

low, for example, 2.01 Hz maximum for ac signals with SCF =

S0 = 0; S1 = 1 (see Table 6). This means that the frequency at

these outputs is generated from active power information

accumulated over a relatively long period. The result is an

output frequency that is proportional to the average active

power. The averaging of the active power signal is implicit to

the digital-to-frequency conversion. The output frequency or

pulse rate is related to the input voltage signals by the following

equation:

()

REF

181

Freq

−

(11)

where:

Freq = output frequency on F1 and F2 (Hz).

VAN, VBN, and VCN = differential rms voltage signal on voltage

channels (V).

IA, IB, and IC = differential rms voltage signal on current channels

(V).

VREF = the reference voltage (2.4 V ±8%) (V).

F1–7 = one of seven possible frequencies selected by using the

logic inputs SCF, S0, and S1 (see Table 5).

Table 5. F1–7 Frequency Selection1

SCF

F1–7 (Hz)

2.30

4.61

1.15

4.61

5.22

1.15

0.58

1 F1–7 is a fraction of the master clock and therefore varies if the specified

CLKIN frequency is altered.

Example 1

Thus, if full-scale differential dc voltages of +500 mV are

applied to VA, VB, VC, IA, IB, and IC, respectively (500 mV is

the maximum differential voltage that can be connected to

current and voltage channels), then the expected output

frequency is calculated as follows:

F1–7 = 0.58 Hz, SCF = S0 = S1 = 1

VAN = VBN = VCN = IA = IB = IC

= 500 mV dc = 0.5 V(rms of dc = dc)

VREF = 2.4 V (nominal reference value)

Note that if the on-chip reference is used, actual output

frequencies can vary from device to device due to reference

tolerance of ±8%.

467

181

Freq

(12)

Example 2

In this example, with ac voltages of ±500 mV peak applied to

the voltage channels and current channels, the expected output

frequency is calculated as follows:

()

value

reference

nominal

Vrms

peak

500

SCF

REF

−

(13)

Note that if the on-chip reference is used, actual output fre-

quencies can vary from device to device due to reference

tolerance of ±8%.

233

181

Freq

(14)

As can be seen from these two example calculations, the maximum

output frequency for ac inputs is always half of that for dc input

signals. The maximum frequency also depends on the number of

phases connected to the ADE7752B. In a 3-phase 3-wire delta ser-

vice, the maximum output frequency is different from the maxi-

mum output frequency in a 3-phase 4-wire Wye service. The

reason is that there are only two phases connected to the analog

inputs, but also that in a delta service, the current channel input

and voltage channel input of the same phase are not in phase in

normal operation.

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