ADG2188BCPZ-R2 datasheet(22/28 Pages) AD

22 / 28 page

ADG2188

Rev. 0 | Page 22 of 28

WRITE OPERATION

When writing to the ADG2188, the user must begin with an

address byte and R/W bit, after which the switch acknowledges

that it is prepared to receive data by pulling SDA low. This

address byte is followed by the two 8-bit words. The write

operations for the switch array are shown in Figure 34. Note

that it is only the condition of the switch corresponding to the

bits in the data bytes that changes state. All other switches retain

their previous condition.

READ OPERATION

Readback on the ADG2188 is designed to work as a tool for

debug and can be used to output the status of any of the

64 switches of the device. The readback function is a two-step

sequence that works as follows:

Select the relevant X line to be read back from. Note that

there are eight switches connecting that X line to the eight

Y lines. The next step involves writing to the ADG2188 to

tell the part to reveal the status of those eight switches.

Enter the I2C address of the ADG2188, and set the

R/W to 0 to indicate a write to the device.

Enter the readback address for the X line of interest,

the addresses of which are shown in Table 8. Note that

the ADG2188 is expecting a 2-byte write; therefore, be

sure to also enter another byte of don’t cares (see

Figure 35).

The ADG2188 then places the status of those eight

switches in a register than can be read back.

The second step involves reading back from the register

that holds the status of the eight switches associated with

the X line of choice.

As before, enter the I2C address of the ADG2188. This

time, set the R/W to 1 to indicate a read back from the

device.

As with a write to the device, the ADG2188 outputs a

2-byte sequence during readback. Therefore, the first

eight bits of data out that are read back are all 0s. The

next eight bits of data that come back are the status of

the eight Y lines attached to that particular X line. If

the bit is a 1, then the switch is closed (on); similarly, if

the bit is a 0, the switch is open (off).

The entire read sequence is shown in Figure 35.

DATA

AX3

AX2

AX1

AX0

AY2

AY1

AY0

R/W

SCL

SDA

DATA BYTE

ACK

SWITCH

STOP

COND

MASTER

START

COND

MASTER

ADDRESS BYTE

ACK

SWITCH

ACK

SWITCH

LDSW

Figure 34. Write Operation

Table 8. Readback Addresses for Each X Line

X Line

RB7

RB6

RB5

RB4

RB3

RB2

RB1

RB0

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