Nexperia

74LVC373A

Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

5. Pinning information

5.1. Pinning

74LVC373A

OE

VCC

Q0

Q7

D0

D7

D1

D6

Q1

Q6

Q2

Q5

D2

D5

D3

D4

Q3

Q4

GND

LE

001aad090

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

Fig. 6. Pin configuration SOT163-1 (SO20) and

SOT360-1 (TSSOP20)

001aad089

74LVC373A

Transparent top view

Q4

D3

Q3

D4

D2

D5

Q2

Q5

Q1

Q6

D1

D6

D0

D7

Q0

Q7

9

12

8

13

7

14

6

15

GND(1)

5

16

4

17

3

18

2

19

terminal 1

index area

(1) This is not a ground pin. There is no electrical or

mechanical requirement to solder the pad. In case

soldered, the solder land should remain floating or

connected to GND.

Fig. 7. Pin configuration SOT764-1 (DHVQFN20)

5.2. Pin description

Table 2. Pin description

Symbol

Pin

Description

OE

1

output enable input (active LOW)

LE

11

latch enable input (active HIGH)

D0, D1, D2, D3, D4, D5, D6, D7

3, 4, 7, 8, 13, 14, 17, 18

data input

Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7

2, 5, 6, 9, 12, 15, 16, 19

latch output

GND

10

ground (0 V)

VCC

20

supply voltage

74LVC373A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 5 — 27 August 2021

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