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74LVC373A 数据表(PDF) 8 Page - Nexperia B.V. All rights reserved |
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74LVC373A 数据表(HTML) 8 Page - Nexperia B.V. All rights reserved |
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8 / 15 page ![]() Nexperia 74LVC373A Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state mna812 LE input Qn output tPHL tPLH tW 1/fmax VM VOH VI GND VOL VM Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 9. Latch Enable input (LE) pulse width, the latch enable input to output (Qn) propagation delays mna886 tPLZ tPHZ output disabled output enabled VY VX output enabled Qn output LOW-to-OFF OFF-to-LOW Qn output HIGH-to-OFF OFF-to-HIGH OE input VOL VOH VCC VI VM GND GND tPZL tPZH VM VM Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 10. 3-state enable and disable times mna814 th tsu th tsu VM VM VI GND VI GND LE input Dn input Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 11. Data set-up and hold times for the Dn input to the LE input 74LVC373A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 5 — 27 August 2021 8 / 15 |
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