Nexperia

74LVC573A

Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

-40 °C to +85 °C

-40 °C to +125 °C

Symbol Parameter

Conditions

Min

Typ [1]

Max

Min

Max

Unit

tsk(0)

output skew time

VCC = 3.0 V to 3.6 V

[3]

-

-

1.0

-

1.5

ns

per latch; VI = GND to VCC

[4]

VCC = 1.65 V to 1.95 V

-

7.1

-

-

-

pF

VCC = 2.3 V to 2.7 V

-

10.3

-

-

-

pF

CPD

power dissipation

capacitance

VCC = 3.0 V to 3.6 V

-

13.2

-

-

-

pF

[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.

[2] tpd is the same as tPLH and tPHL.

ten is the same as tPZL and tPZH.

tdis is the same as tPLZ and tPHZ.

[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.

[4] CPD is used to determine the dynamic power dissipation (PD in μW).

PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:

fi = input frequency in MHz; fo = output frequency in MHz

CL = output load capacitance in pF

VCC = supply voltage in Volts

N = number of inputs switching

Σ(CL × VCC 2 × fo) = sum of the outputs

10.1. Waveforms and test circuit

mna811

Dn input

Qn output

tPHL

tPLH

GND

VI

VM

VM

VOH

VOL

Measurement points are given in Table 8.

VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 8. Input (Dn) to output (Qn) propagation delays

mna812

LE input

Qn output

tPHL

tPLH

tW

1/fmax

VM

VOH

VI

GND

VOL

VM

Measurement points are given in Table 8.

VOL and VOH are typical output voltage levels that occur with the output load.

Fig. 9. Latch Enable input (LE) pulse width, the latch enable input to output (Qn) propagation delays

74LVC573A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 8 — 27 August 2021

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