Nexperia

74LVC573A

Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

12. Abbreviations

Table 10. Abbreviations

Acronym

Description

CDM

Charged Device Model

CMOS

Complementary Metal-Oxide Semiconductor

DUT

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

TTL

Transistor-Transistor Logic

13. Revision history

Table 11. Revision history

Document ID

Release date

Data sheet status

Change notice Supersedes

74LVC573A v.8

20210827

Product data sheet

-

74LVC573A v.7

Modifications:

• Section 1 and Section 2 updated.

• Type number 74LVC573ADB (SOT339-1/SSOP20) removed.

74LVC573A v.7

20200330

Product data sheet

-

74LVC573A v.6

Modifications:

• Table 4: Derating values for Ptot total power dissipation updated.

74LVC573A v.6

20180926

Product data sheet

-

74LVC573A v.5

Modifications:

• The format of this data sheet has been redesigned to comply with the identity guidelines

of Nexperia.

• Legal texts have been adapted to the new company name where appropriate.

• Type number 74LVC573ABX (SOT1045-2) removed.

• Fig. 15: Package outline drawing SOT764-1 updated

74LVC573A v.5

20130219

Product data sheet

-

74LVC573A v.4

Modifications:

• 74LVC573ABX added.

74LVC573A v.4

20121129

Product data sheet

-

74LVC573A v.3

Modifications:

• The format of this data sheet has been redesigned to comply with the new identity

guidelines of NXP Semiconductors.

• Legal texts have been adapted to the new company name where appropriate.

• Table 4, Table 5, Table 6, Table 7, Table 8 and Table 9: values added for lower voltage

ranges.

74LVC573A v.3

20031003

Product specification

-

74LVC573A v.2

74LVC573A v.2

20030526

Product specification

-

74LVC573A v.1

74LVC573A v.1

19980729

Product specification

-

-

74LVC573A

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 8 — 27 August 2021

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