AN2533/D

2

Standard SVM – 3 outputs version – XOR version TPU Function Set (svmStd3Xor)

MOTOROLA

•

Synchronization Signal for Standard Space Vector Modulation – 3

outputs version – XOR version (svmStd3Xor_sync)

•

Resolver Reference Signal for Standard Space Vector Modulation – 3

outputs version – XOR version (svmStd3Xor_res)

•

Fault Input for Standard Space Vector Modulation – 3 outputs version –

XOR version (svmStd3Xor_fault)

The svmStd3Xor function generates 3 pairs of XOR gate input signals. The

XOR gate outputs then produce a 3-channel 3-phase center-aligned PWM

signal. The generated signals control external hardware, which outputs pair of

transistor signals (top and bottom) with dead-time inserted. The

Synchronization Signal for the svmStd3Xor function can be used to generate

one or more adjustable signals for a wide range of uses, that are synchronized

to the PWM, and track changes in the PWM period. The Resolver Reference

Signal for the svmStd3Xor function can be used to generate one or more 50%

duty-cycle adjustable signals that are also synchronized to the PWM. The Fault

Input for the svmStd3Xor function is a TPU input function that sets all XOR gate

outputs low when the input signal goes low.

Function Set Configuration

None of the TPU functions in the Standard Space Vector Modulation – 3

outputs version – XOR version TPU function set can be used separately. The

svmStd3Xor_R and svmStd3Xor_T functions have to be used together. The

svmStd3Xor_R runs on pins A1, B1, C1, and the svmStd3Xor_T runs on pins

A2, B2, C2 – see Figure 1. One or more channels running Synchronization

Signal for svmStd3Xor as well as Resolver Reference Signals for svmStd3Xor

functions can be added to the svmStd3Xor_R and svmStd3Xor_T functions.

They can run with different settings on each channel. The function Fault Input

for svmStd3Xor can also be added to the svmStd3Xor_R and svmStd3Xor_T

functions. It is recommended to use it on channel 15, and to set the hardware

option that disables all TPU output pins when the channel 15 input signal is low

(DTPU bit = 1). This ensures that the hardware reacts quickly to a pin fault

state. Note that it is not only the svmStd3Xor_R and svmStd3Xor_T channels,

but all TPU output channels, including the synchronization signals, that are

disabled in this configuration.

Table 1 shows the configuration options and restrictions.

Freescale Semiconductor, Inc.

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