ADP2105/ADP2106/ADP2107

Rev. 0 | Page 6 of 32

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

NC = NO CONNECT

11 PGND

12 LX2

10 LX1

9PWIN2

ADP2105/

ADP2106/

ADP2107

TOP VIEW

(Not to Scale)

EN 1

GND 2

GND 3

GND 4

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Mnemonic

Pin No.

ADP210x-xx

ADP210x-ADJ

Description

1

EN

EN

Enable Input. Drive EN high to turn on the ADP2105/ADP2106/ADP2107. Drive EN low to turn

it off and reduce the input current to 0.1

μA.

2, 3, 4,

15

GND

GND

Test Pins. These pins are used by Analog Devices, Inc. for internal testing and are not ground

return pins. Tie these pins to the AGND plane as close to the ADP2105/ADP2106/ADP2107 as

possible.

5

COMP

COMP

Feedback Loop Compensation Node. COMP is the output of the internal transconductance

error amplifier. Place a series RC network from COMP to AGND to compensate the converter.

See the Loop Compensation section.

6

SS

SS

Soft Start Input. Place a capacitor from SS to AGND to set the soft start period. A 1 nF capacitor

sets a 1 ms soft start period.

7

AGND

AGND

Analog Ground. Connect the ground of the compensation components, soft start capacitor,

and the voltage divider on the FB pin to the AGND pin as close as possible to the ADP2105/

ADP2106/ADP2107. Also connect AGND to the exposed pad of ADP2105/ADP2106/ADP2107.

8

NC

NC

No Connect. Not internally connected. Can be connected to other pins or left unconnected.

9, 13

PWIN2,

PWIN1

PWIN2, PWIN1

Power Source Inputs. The source of the PFET high-side switch. Bypass each PWIN pin to the nearest

PGND plane with a 4.7 μF or greater capacitor as close as possible to the ADP2105/ADP2106/

ADP2107. See the Input Capacitor Selection section.

10, 12

LX1, LX2

LX1, LX2

Switch Outputs. The drain of the P-channel power switch and N-channel synchronous rectifier.

Tie the two LX pins together and connect the output LC filter between LX and the output

voltage.

11

PGND

PGND

Power Ground. Connect the ground return of all input and output capacitors to PGND pin,

using a power ground plane as close as possible to the ADP2105/ADP2106/ADP2107. Also

connect PGND to the exposed pad of the ADP2105/ADP2106/ADP2107.

14

IN

IN

ADP2105/ADP2106/ADP2107 Power Input. The power source for the ADP2105/ADP2106/

ADP2107 internal circuitry. Connect IN and PWIN1 with a 10 Ω resistor as close as possible to

the ADP2105/ADP2106/ADP2107. Bypass IN to AGND with a 0.1 μF or greater capacitor. See

the Input Filter section.

16

OUT_SENSE

FB

Output Voltage Sense or Feedback Input. For fixed output versions, connect OUT_SENSE to the

output voltage. For adjustable versions, FB is the input to the error amplifier. Drive FB through

a resistive voltage divider to set the output voltage. The FB regulation voltage is 0.8 V.