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74LVC2T45 数据表(PDF) 15 Page - Nexperia B.V. All rights reserved |
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74LVC2T45 数据表(HTML) 15 Page - Nexperia B.V. All rights reserved |
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15 / 33 page ![]() Nexperia 74LVC2T45; 74LVCH2T45 Dual supply translating transceiver; 3-state 11.1. Waveforms and test circuit 001aaj644 nA, nB input nB, nA output tPLH tPHL GND VI VOH VM VM VOL Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The data input (A, B) to output (B, A) propagation delay times 001aae968 tPZL tPZH tPHZ tPLZ GND GND VI VCCO VOL VOH VM VM VM VX VY outputs disabled outputs enabled outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH DIR input Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. Enable and disable times Table 14. Measurement points Supply voltage Input [1] Output [2] VCC(A), VCC(B) VM VM VX VY 1.2 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH - 0.1 V 1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH - 0.15 V 3.0 V to 5.5 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH - 0.3 V [1] VCCI is the supply voltage associated with the data input port. [2] VCCO is the supply voltage associated with the output port. 74LVC_LVCH2T45 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2023. All rights reserved Product data sheet Rev. 12 — 1 March 2023 15 / 33 |
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