P87LPC764FN datasheet(47/60 Pages) PHILIPS

47 / 60 page

Philips Semiconductors

Product data

P87LPC764

Low power, low price, low pin count (20 pin)

microcontroller with 4 kbyte OTP

2003 Sep 03

DC ELECTRICAL CHARACTERISTICS (FOR P87LPC764BD, BN, BDH, FN, FD, FDH, BD/01, BDH/01)

VDD = 2.7 V to 6.0 V unless otherwise specified; Tamb = 0°C to +70°C or –40°C to +85°C, unless otherwise specified.

SYMBOL

PARAMETER

TEST CONDITIONS

LIMITS

UNIT

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP1

MAX

UNIT

IDD

Power supply current operating

5.0 V, 20 MHz11

IDD

Power su

ly current, o erating

3.0 V, 10 MHz11

IID

Power supply current Idle mode

5.0 V, 20 MHz11

IID

Power su

ly current, Idle mode

3.0 V, 10 MHz11

IPD

Power supply current Power Down mode

5.0 V11

µA

IPD

Power su

ly current, Power Down mode

3.0 V11

µA

VRAM

RAM keep-alive voltage

1.5

VIL

Input low voltage (TTL input)

4.0 V < VDD < 6.0 V

–0.5

0.2 VDD–0.1

VIL

In ut low voltage (TTL in ut)

2.7 V < VDD < 4.0 V

–0.5

0.7

VIL1

Negative going threshold (Schmitt input)

–0.5

0.3 VDD

VIH

Input high voltage (TTL input)

0.2 VDD+0.9

VDD+0.5

VIH1

Positive going threshold (Schmitt input)

0.7 VDD

VDD+0.5

HYS

Hysteresis voltage

0.2 VDD

VOL

Output low voltage all ports5, 9

IOL = 3.2 mA, VDD = 2.7 V

0.4

VOL1

Output low voltage all ports5, 9

IOL = 20 mA, VDD = 2.7 V

1.0

VOH

Output high voltage all ports3

IOH = –20 µA, VDD = 2.7 V

VDD–0.7

VOH

Out ut high voltage, all orts3

IOH = –30 µA, VDD = 4.5 V

VDD–0.7

VOH1

Output high voltage, all ports4

IOH = –1.0 mA, VDD = 2.7 V

VDD–0.7

CIO

Input/Output pin capacitance10

IIL

Logical 0 input current, all ports8

VIN = 0.4 V

–50

µA

ILI

Input leakage current, all ports7

VIN = VIL or VIH

±2

µA

ITL

Logical 1 to 0 transition current all ports3, 6

VIN = 1.5 V at VDD = 3.0 V

–30

–250

µA

ITL

Logical 1 to 0 transition current, all orts3, 6

VIN = 2.0 V at VDD = 5.5 V

–150

–650

µA

RRST

Internal reset pull-up resistor14

225

Ω

VBOLOW

Brownout trip voltage with BOV = 112

2.35

2.69

VBOHI

Brownout trip voltage with BOV = 0

3.45

3.99

VREF

Reference voltage

1.11

1.26

1.41

tC (VREF)

Temperature coefficient

tbd

ppm/

°C

Supply sensitivity

tbd

%/V

NOTES:

1. Typical ratings are not guaranteed. The values listed are at room temperature, 5 V.

2. See other Figures for details.

Active mode: ICC(MAX) = tbd

Idle mode: ICC(MAX) = tbd

3. Ports in quasi-bidirectional mode with weak pull-up (applies to all port pins with pull-ups). Does not apply to open drain pins.

4. Ports in PUSH-PULL mode. Does not apply to open drain pins.

5. In all output modes except high impedance mode.

6. Port pins source a transition current when used in quasi-bidirectional mode and externally driven from 1 to 0. This current is highest when

VIN is approximately 2 V.

7. Measured with port in high impedance mode. Parameter is guaranteed but not tested at cold temperature.

8. Measured with port in quasi-bidirectional mode.

9. Under steady state (non-transient) conditions, IOL must be externally limited as follows:

Maximum IOL per port pin:

20 mA

Maximum total IOL for all outputs:

80 mA

Maximum total IOH for all outputs:

5 mA

If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed

test conditions.

10. Pin capacitance is characterized but not tested.

11. The IDD, IID, and IPD specifications are measured using an external clock with the following functions disabled: comparators, brownout

detect, and watchdog timer. For VDD = 3 V, LPEP = 1. Refer to the appropriate figures on the following pages for additional current drawn by

each of these functions and detailed graphs for other frequency and voltage combinations.

12. Devices initially operating at VDD = 2.7V or above and at fOSC = 10 MHz or less are guaranteed to continue to execute instructions correctly

at the brownout trip point. Initial power-on operation below VDD = 2.7 V is not guaranteed.

13. Devices initially operating at VDD = 4.0 V or above and at fOSC = 20 MHz or less are guaranteed to continue to execute instructions correctly

at the brownout trip point. Initial power-on operation below VDD = 4.0 V and FOSC > 10 MHz is not guaranteed.

14. This internal resistor is disconnected if P1.5 is used as a general purpose input pin instead of the reset pin.

P87LPC764FN 数据表(PDF) 47 Page - NXP Semiconductors

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P87LPC764FN 数据表(PDF) 47 Page - NXP Semiconductors

P87LPC764FN 数据表(HTML) 47 Page - NXP Semiconductors

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