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BSP89 数据表(PDF) 3 Page - NXP Semiconductors |
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BSP89 数据表(HTML) 3 Page - NXP Semiconductors |
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3 / 8 page ![]() April 1995 3 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSP89 CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage ID = 10 µA; VGS = 0 240 −− V IDSS drain-source leakage current VDS = 60 V; VGS = 0 −− 200 nA ±I GSS gate-source leakage current ±VGS = 20 V; VDS = 0 −− 100 nA VGS(th) gate-source threshold voltage ID = 1 mA; VGS = VDS 0.8 − 2V RDS(on) drain-source on-resistance ID = 340 mA; VGS = 10 V − 46 Ω ID = 340 mA; VGS = 4.5 V −− 10 Ω Yfs transfer admittance ID = 340 mA; VDS = 25 V 140 350 − mS Ciss input capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 65 140 pF Coss output capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 20 30 pF Crss feedback capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 59pF Switching times (see Figs 3 and 4) ton turn-on time ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V − 510 ns toff turn-off time ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V − 20 30 ns Fig.2 Power derating curve. handbook, 0 50 100 200 2 0 1.6 150 1.2 0.8 0.4 MBB693 Ptot (W) Tamb (°C) Fig.3 Switching times test circuit. handbook, halfpage MBB691 50 Ω VDD = 50 V ID 10 V 0 V |
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