AD8000

Rev. 0 | Page 15 of 20

LOW DISTORTION PINOUT

The AD8000 LFCSP features ADI’s new low distortion pinout.

The new pinout lowers the second harmonic distortion and

simplifies the circuit layout. The close proximity of the non-

inverting input and the negative supply pin creates a source of

second harmonic distortion. Physical separation of the non-

inverting input pin and the negative power supply pin reduces

this distortion significantly, as seen in Figure 22.

By providing an additional output pin, the feedback resistor

can be connected directly across Pin 2 and Pin 3. This greatly

simplifies the routing of the feedback resistor and allows a more

compact circuit layout, which reduces its size and helps to

minimize parasitics and increase stability.

The SOIC also features a dedicated feedback pin. The feedback

pin is brought out on Pin 1, which is typically a No Connect on

standard SOIC pinouts.

Existing applications that use the standard SOIC pinout can

take full advantage of the performance offered by the AD8000.

For drop-in replacements, ensure that Pin 1 is not connected to

ground or to any other potential because this pin is connected

internally to the output of the amplifier. For existing designs,

Pin 6 can still be used for the feedback resistor.

EXPOSED PADDLE

The AD8000 features an exposed paddle, which can lower the

thermal resistance by 25% compared to a standard SOIC plastic

package. The paddle can be soldered directly to the ground plane

of the board. Figure 53 shows a typical pad geometry for the

LFCSP, the same type of pad geometry can be applied to the

SOIC package.

Thermal vias or “heat pipes” can also be incorporated into the

design of the mounting pad for the exposed paddle. These addi-

tional vias improve the thermal transfer from the package to

the PCB. Using a heavier weight copper on the surface to which

the amplifier’s exposed paddle is soldered also reduces the over-

all thermal resistance “seen” by the AD8000.

Figure 53. LFCSP Exposed Paddle Layout

PRINTED CIRCUIT BOARD LAYOUT

Laying out the printed circuit board (PCB) is usually the last

step in the design process and often proves to be one of the

most critical. A brilliant design can be rendered useless because

of a poor or sloppy layout. Since the AD8000 can operate into

siderations must be taken into account. The PCB layout, signal

routing, power supply bypassing, and grounding all must be

addressed to ensure optimal performance.

SIGNAL ROUTING

The AD8000 LFCSP features the new low distortion pinout

with a dedicated feedback pin and allows a compact layout. The

dedicated feedback pin reduces the distance from the output to

the inverting input, which greatly simplifies the routing of the

feedback network.

To minimize parasitic inductances, ground planes should be

used under high frequency signal traces. However, the ground

plane should be removed from under the input and output pins

to minimize the formation of parasitic capacitors, which

degrades phase margin. Signals that are susceptible to noise

pickup should be run on the internal layers of the PCB, which

can provide maximum shielding.

POWER SUPPLY BYPASSING

Power supply bypassing is a critical aspect of the PCB design

process. For best performance, the AD8000 power supply pins

need to be properly bypassed.

A parallel connection of capacitors from each of the power

supply pins to ground works best. Paralleling different values

and sizes of capacitors helps to ensure that the power supply

pins “see” a low ac impedance across a wide band of frequencies.

This is important for minimizing the coupling of noise into the

amplifier. Starting directly at the power supply pins, the smallest

value and sized component should be placed on the same side

of the board as the amplifier, and as close as possible to the

amplifier, and connected to the ground plane. This process

should be repeated for the next larger value capacitor. It is

recommended for the AD8000 that a 0.1 µF ceramic 0508 case

be used. The 0508 offers low series inductance and excellent

high frequency performance. The 0.1 µF case provides low

impedance at high frequencies. A 10 µF electrolytic capacitor

should be placed in parallel with the 0.1 µF. The 10 µf capacitor

provides low ac impedance at low frequencies. Smaller values

of electrolytic capacitors can be used, depending on the circuit

requirements. Additional smaller value capacitors help to

provide a low impedance path for unwanted noise out to higher

frequencies but are not always necessary.