74LVC00A

Quad 2-input NAND gate

Rev. 9 — 17 September 2021

Product data sheet

1. General description

The 74LVC00A is a quad 2-input NAND gate. Inputs can be driven from either 3.3 V or 5 V devices.

This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

2. Features and benefits

• Overvoltage tolerant inputs to 5.5 V

• Wide supply voltage range from 1.2 V to 3.6 V

• CMOS low-power consumption

• Direct interface with TTL levels

• Complies with JEDEC standard:

• JESD8-7A (1.65 V to 1.95 V)

• JESD8-5A (2.3 V to 2.7 V)

• JESD8-C/JESD36 (2.7 V to 3.6 V)

• ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-B exceeds 200 V

• CDM JESD22-C101E exceeds 1000 V

• Multiple package options

• Specified from -40 °C to +85 °C and -40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Package

Type number

Temperature range Name

Description

Version

74LVC00AD

-40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74LVC00APW -40 °C to +125 °C

TSSOP14

plastic thin shrink small outline package; 14 leads;

body width 4.4 mm

SOT402-1

74LVC00ABQ

-40 °C to +125 °C

DHVQFN14 plastic dual in-line compatible thermal enhanced

very thin quad flat package; no leads; 14 terminals;

body 2.5 × 3 × 0.85 mm

SOT762-1