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FXPS7115D4S 数据表(PDF) 36 Page - NXP Semiconductors

部件名 FXPS7115D4S
功能描述  Digital absolute pressure sensor, 40 kPa to 115 kPa
PDF  72 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

FXPS7115D4S 数据表(HTML) 36 Page - NXP Semiconductors

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NXP Semiconductors
FXPS7115D4S
Digital absolute pressure sensor, 40 kPa to 115 kPa
Bit
7
6
5
4
3
2
1
0
Name
UOTP_WR_INIT
Reserved
Reserved
Reserved
EX_COMMTYPE
EX_PADDR
UOTP_REGION[1:0]
Access
R/W
R/W
R/W
v
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Table 49. WRITE_OTP_EN – write OTP enable register – (address 11h) bit allocation
Register writes executed by the user to the user programmed OTP array only update the mirror register
contents for the OTP array, not the actual OTP registers. To copy the values to the actual OTP registers, a
write must be executed to the WRITE_OTP_EN register with the UOTP_WR_INIT bit set. The state of the
UOTP_REGION[1:0], the EX_COMMTYPE, and the EX_PADDR bits in the command determine which region of
OTP is written to as shown in Table 50.
EX_COMMTYPE EX_PADDR
UOTP_REGION[1] UOTP_REGION[0] OTP write operation
Special conditions
x
x
0
0
Write the current contents of the UF0 registers to OTP
x
x
0
1
Write the current contents of the UF1 registers to OTP
0
0
1
0
Reserved for future use.
0
1
1
0
Reserved for future use.
1
0
1
0
Reserved for future use.
1
1
1
0
Write the current contents of the UF2 registers to OTP.
Excluding LPF. LPF defaults to 1000
Hz at POR.
x
x
1
1
Reserved for future use
Table 50. Writes for OTP registers
The UF0 and UF1 user OTP regions as well as the NXP programmed F OTP regions share common mirror
registers. For this reason, writes to the OTP for each region must be completed independently according to the
procedure below.
Once a region is written using the OTP Write sequence, the LOCK_Uxxx bit in the appropriate CRC_xxx
register is automatically set, locking the array from future writes. Once a region is locked, an error detection is
activated to detect changes to the register values. Register values in the UF2 region can be overwritten using
register write commands, but no new values can be written to the OTP.
The procedure for writing to the user OTP array UF0 and UF1 regions is listed below:
1. Read the appropriate CRC_UFx register and confirm the LOCK_Uxx bit is not set.
2. Write the desired values to the user array registers for only the region to be written using the procedures in
Section 7.7.6 "UF_REGION_W, UF_REGION_R - UF region selection registers (address 14h, 15h)" .
The user must take care to ensure that the proper data is written to each region. If a register write is
executed to a new region, the base address changes to the new region. The previous data written to the
register block remains in the shared registers and is written to OTP if the Write OTP sequence is completed.
3. Execute a write to the WRITE_OTP_EN register with the appropriate bits set for the desired region to
program.
Once the WRITE_OTP_EN register write is completed, a CRC is calculated for the data to be written
to the region, the register values are written to OTP and the region is locked from future writes. The
UOTP_WR_INIT bit remains set.
4. Delay 10 ms to allow the device to complete the writes to OTP.
5. Verify that the OTP write has successfully completed by reading back all of the OTP registers using register
read commands as defined in Section 7.7.6 "UF_REGION_W, UF_REGION_R - UF region selection
registers (address 14h, 15h)".
6. Repeat steps 1 through 4 for all regions to be programmed.
The procedure for writing to the user OTP array UF2 region is listed below:
1. Read the CRC_UF2 register and confirm the LOCK_UF2 bit is not set.
2. Write the desired values to the user array registers.
FXPS7115D4S
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Objective data sheet
Rev. 1.2 — 28 June 2023
36 / 72



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