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ICS553MIT 数据表(PDF) 5 Page - Integrated Circuit Systems |
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ICS553MIT 数据表(HTML) 5 Page - Integrated Circuit Systems |
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5 / 6 page ![]() LOW SKEW 1 TO 4 CLOCK BUFFER MDS 553 H 5 Revision 080404 In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 295-9 800 ● www.icst.com ICS553 AC Electrical Characteristics VDD = 2.5V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise VDD = 3.3V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise VDD = 5V ±5%, Ambient Temperature -40 to +85 °C, unless stated otherwise Notes: 1. With rail to rail input clock 2. Between any 2 outputs with equal loading. 3. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock generators. Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency 0 200 MHz Output Rise Time tOR 0.8 to 2.0V, CL=15pF 1.0 1.5 ns Output Fall Time tOF 2.0 to 0.8V, CL=15pF 1.0 1.5 ns Propagation Delay Note 1 2.2 3 5 ns Output to output skew Note 2 Rising edges at VDD/2 0 50 ps Device to device skew Rising edges at VDD/2 500 ps Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency 0 200 MHz Output Rise Time tOR 0.8 to 2.0V, CL=15pF 0.6 1.0 ns Output Fall Time tOF 2.0 to 0.8V, CL=15pF 0.6 1.0 ns Propagation Delay Note 1 2.0 2.4 4 ns Output to output skew Note 2 Rising edges at VDD/2 0 50 ps Device to device skew Rising edges at VDD/2 500 ps Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency 0 200 MHz Output Rise Time tOR 0.8 to 2.0V, CL=15pF 0.3 0.7 ns Output Fall Time tOF 2.0 to 0.8V, CL=15pF 0.3 0.7 ns Propagation Delay Note 1 1.8 2.5 4 ns Output to output skew Note 2 Rising edges at VDD/2 0 50 ps Device to device skew Rising edges at VDD/2 500 ps Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient θ JA Still air 150 °C/W θ JA 1 m/s air flow 140 °C/W θ JA 3 m/s air flow 120 °C/W Thermal Resistance Junction to Case θ JC 40 °C/W |
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