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CS4412 数据表(PDF) 2 Page - Cirrus Logic |
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CS4412 数据表(HTML) 2 Page - Cirrus Logic |
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2 / 22 page ![]() 2 DS749A1 CS4412 TABLE OF CONTENTS 1. PIN DESCRIPTION ................................................................................................................................. 2 2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 4 RECOMMENDED OPERATING CONDITIONS .................................................................................... 4 ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 4 PWM POWER OUTPUT CHARACTERISTICS ..................................................................................... 5 DC ELECTRICAL CHARACTERISTICS ................................................................................................ 6 DIGITAL INTERFACE SPECIFICATIONS ............................................................................................. 6 DIGITAL I/O PIN CHARACTERISTICS ................................................................................................. 7 3. TYPICAL CONNECTION DIAGRAMS ................................................................................................. 8 4. APPLICATIONS ................................................................................................................................... 12 4.1 Overview ........................................................................................................................................ 12 4.2 Reset and Power-Up ...................................................................................................................... 12 4.2.1 PWM Popguard Transient Control ........................................................................................ 12 4.2.2 Recommended Power-Up Sequence .................................................................................... 12 4.2.3 Recommended Power-Down Sequence .............................................................................. 13 4.3 Output Mode Configuration ............................................................................................................ 13 4.4 Output Filters ................................................................................................................................. 14 4.4.1 Half-Bridge Output Filter ........................................................................................................ 14 4.4.2 Full-Bridge Output Filter (Stereo or Parallel) ......................................................................... 15 4.5 Device Protection and Error Reporting .......................................................................................... 16 4.5.1 Over-current Protection ......................................................................................................... 16 4.5.2 Thermal Warning, Thermal Error, and Under-Voltage Error ................................................. 16 5. POWER SUPPLY, GROUNDING, AND PCB LAYOUT ....................................................................... 17 5.1 Power Supply and Grounding ........................................................................................................ 17 5.1.1 Integrated VD Regulator ........................................................................................................ 17 5.2 QFN Thermal Pad .......................................................................................................................... 17 6. PARAMETER DEFINITIONS ................................................................................................................ 18 7. PACKAGE DIMENSIONS .................................................................................................................... 19 8. THERMAL CHARACTERISTICS ......................................................................................................... 20 8.1 Thermal Flag .................................................................................................................................. 20 9. ORDERING INFORMATION ................................................................................................................ 21 10. REVISION HISTORY .......................................................................................................................... 21 LIST OF FIGURES Figure 1.Stereo Full-Bridge Typical Connection Diagram ........................................................................... 8 Figure 2.2.1 Channel Typical Configuration Diagram ................................................................................. 9 Figure 3.4-Channel Half-Bridge Typical Connection Diagram .................................................................. 10 Figure 4.Mono Parallel Full-Bridge Typical Connection Diagram ............................................................. 11 Figure 5.Output Filter - Half-Bridge ........................................................................................................... 14 Figure 6.Output Filter - Full-Bridge ............................................................................................................ 15 LIST OF TABLES Table 1. I/O Power Rails ............................................................................................................................. 7 Table 2. Output Mode Configuration Options ............................................................................................ 13 Table 3. Low-Pass Filter Components - Half-Bridge ................................................................................. 14 Table 4. DC-Blocking Capacitors Values - Half-Bridge ............................................................................. 15 Table 5. Low-Pass Filter Components - Full-Bridge ................................................................................. 15 Table 6. Over-current Error Conditions ..................................................................................................... 16 Table 7. Thermal and Under-Voltage Error Conditions ............................................................................. 16 Table 8. VD Supply Level Indication ......................................................................................................... 17 |
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