DS749A1

3

CS4412

1. PIN DESCRIPTION

Pin Name

Pin #

Pin Description

CNFG0

CNFG1

CNFG2

1

2

3

Out Configuration Select (Input) - Used to set the PWM output configuration mode. See “Output

Mode Configuration” on page 14.

IN1

IN2

IN3

IN4

4

5

6

7

PWM Input (Input) - Inputs from a PWM modulator.

RST1/2

RST3/4

8

46

Reset Input (Input) - Reset inputs for channels 1/2 and 3/4 respectively. Active low.

LVD

9

VD Voltage Level Indicator (Input) - Identifies the voltage level attached to VD. When applying

5.0 V to VD, LVD must be connected to VD. When applying 2.5 V or 3.3 V to VD, LVD must be

GND.

VD_REG

11

Core Digital Power (Output) - Filter connection for the internally generated power supply for the

low voltage digital circuitry.

VD

12

Digital Power (Input) - Low voltage power supply for internal logic.

VA_REG

13

Core Analog Power (Output) - Filter connection for internally generated power supply for the low

voltage analog circuitry

14

13

8

7

6

5

4

3

2

1

15

16

17

18

19

20

29

30

31

32

33

34

35

36

41

42

43

44

45

46

47

48

Top-Down View

48-Pin QFN Package

37

38

39

40

12

11

10

9

21

22

23

24

25

26

27

28

CNFG0

CNFG1

CNFG2

IN1

IN2

RST12

VP

OUT1

PGND

PGND

OUT2

VP

VP

OUT3

LVD

VD_REG

VD

PGND

PGND

OUT4

VP

IN3

IN4

GND

CS4412