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NTS0102DP125 数据表(PDF) 3 Page - NXP Semiconductors |
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NTS0102DP125 数据表(HTML) 3 Page - NXP Semiconductors |
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3 / 43 page ![]() NXP Semiconductors NTS0102 Dual supply translating transceiver; open-drain; auto direction sensing 5 Functional diagram 001aal905 VCC(A) VCC(B) 1 8 B2 B1 4 6 5 A2 OE GATE BIAS A1 GATE BIAS Figure 1. Logic symbol 6 Pinning information 6.1 Pinning NTS0102 B2 B1 GND VCC(B) VCC(A) OE A2 A1 001aam488 1 2 3 4 6 5 8 7 Figure 2. Pin configuration SOT505-2 (TSSOP8) NTS0102 OE VCC(B) B1 A1 VCC(A) GND B2 A2 001aam489 3 6 2 7 1 8 4 5 Transparent top view Figure 3. Pin configuration SOT833-1 (XSON8) and SOT1089 (XSON8) NTS0102 All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Product data sheet Rev. 4.5 — 6 July 2023 3 / 43 |
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