Data Sheet G11024EJ6V0DS00

5

µµµµPC1663

TEST CIRCUIT

50

Ω

1 000 pF

µ

µ

µ

1 k

Ω

VCC

–

0.1 F

1

2

3

4

8

7

6

5

50

Ω

IN

ZS = 50

Ω

ZL =

50

Ω

OUT

1 000 pF

950

Ω

0.1 F

0.1 F

VCC+

Remark Measurement value at

OUT connector should

be converced into DUT’s

output value at pin 5.

Remark

Definition and test circuit of each characteristic should be referred to application note ‘Usage of

µPC1663 (Document No. G12290E)’.

NOTES ON CORRECT USE

(1)

Observe precautions for handling because of electro-static sensitive devices.

(2)

Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired

oscillation).

(3)

The bypass capacitor should be attached to VCC line.

(4)

When gain between Gain 1 and Gain 2 is necessary, insert adjustment resistor (0 to 10 k

Ω

Ω

Ω

Ω) between

G1A and G1B to determine gain value.

(5)

Due to high-frequency characteristics, the physical circuit layout is very critical. Supply voltage line

bypass, double-sided printed-circuit board, and wide-area ground line layout are necessary for stable

operation. Two signal resistors connected to both inputs and two load resistors connected to both

outputs should be balanced for stable operation.

50

Ω

50

Ω

(150

Ω to ∞)

(150

Ω to ∞)

VCC+

VCC–