UPD78P014 datasheet(28/64 Pages) RENESAS

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µPD78P014

Subsystem Clock Oscillator Characteristics (Ta = –40 to +85

°C, VDD = 2.7 to 6.0 V)

MIN.

TYP.

MAX.

Unit

32.768

kHz

1.2

100

kHz

515

µs

Recommended

Circuit

Parameter

Oscillation frequency

(fXT)Note 1

Oscillation stabiliza-

tion timeNote 2

XT1 input frequency

(fXT)Note 1

XT1 input high-/low-

level width (tXTH/tXTL)

Resonator

Crystal

resonator

External clock

Notes 1. Only the oscillator characteristics are shown. Refer to AC characteristics for instruction execution times.

2. Time required to stabilize oscillation after VDD reaches MIN. of oscillation voltage range.

Cautions 1. When the subsystem clock oscillator is used, the following should be noted concerning wiring in the

area in the figure enclosed by a dotted line to prevent the influence of wiring capacitance, etc.

• The wiring should be kept as short as possible.

• No other signal lines should be crossed.

• Keep away from lines carrying a high fluctuating current.

• The oscillator capacitor grounding point should always be at the same potential as VSS.

• Do not connect to a ground pattern carrying a high current.

• A signal should not be taken from the oscillator.

2. The subsystem clock oscillator is a circuit with a low amplification level, more prone to misoperation

due to noise than the main system clock. When using the subsystem clock, special care is needed

regarding the wiring method.

Test Conditions

VDD = 4.5 to 6.0 V

XT1 XT2

Vss

XT1 XT2

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