VP7615 datasheet(19/25 Pages) MITEL

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VP7615

RCLK to output (CPSEL, SDAO, SDMN)

rising edge of CPCKA or CPCKB to output (YY[7..0], UV[7..0],

CLK1, VSYNC, HSYNC,VACT, HACT, BFLAG)

falling edge of CLK2 to output (YY[7..0], UV[7..0], CLK1, VSYNC,

HSYNC, VACT, HACT, BFLAG)

falling edge of CLK1 to output (YY[7..0], UV[7..0],VSYNC, HSYNC,

VACT, HACT, BFLAG)

propagation delay from CPCKA or CPCKB to CK2

propagation delay from INVI to INVO

propagation delay from SCLI to SCLOA or SCLOB

rising edge of OUTEN to outputs tri-state (CLK1, CLK2, VSYNC,

HSYNC, VACT, HACT, BFLAG, FIELD, YY[7:0], UV[7:0])

falling edge of OUTEN to outputs (CLK1, CLK2, VSYNC, HSYNC,

VACT, HACT, BFLAG, FIELD, YY[7:0], UV[7:0])

-2

-3

fCPX

tCPX

dcCPX

tsuCPDX

thCPDX

fRCK

twRSTN

Description

Name

frequency CPCKA or CPCKB

period CPCKA or CPCKB

duty cycle CPCKA or CPCKB

setup time,

CPDA [3..0] to CPCKA or

CPDB [3..0] to CPCKB

hold time,

CPDA [3..0] to CPCKA or

CPDB [3..0] to CPCKB

frequency RCLK

pulse width of RSTN

Unit

Min.

Max.

MHz

110

TIMING REQUIREMENTS

Value

tcqRCLK

tcpCPX

tcqCK2f

tcpCK1f

tpdCK2

tpdINV

tpdSCL

tdis

toen

Description

Name

Unit

Min.

TIMING CHARACTERISTICS

Value

Max.

HACT

VACT

FIELD

VSYNC

3.0H

Fig.8 Odd Field Timing

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