数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

UPD78P9014CT 数据表(PDF) 32 Page - Renesas Technology Corp

部件名 UPD78P9014CT
功能描述  MOS INTEGRATED CIRCUIT
PDF  50 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

UPD78P9014CT 数据表(HTML) 32 Page - Renesas Technology Corp

Back Button UPD78P9014CT Datasheet HTML 28Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 29Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 30Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 31Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 32Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 33Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 34Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 35Page - Renesas Technology Corp UPD78P9014CT Datasheet HTML 36Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 32 / 50 page
background image
µPD78P9014
30
(2) Serial interface channel 0 (TA = –40 to +85
°, VDD = 1.8 to 5.5 V)
(i)
3-wire serial I/O mode (SCK0 - on-chip clock output)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK0 cycle time
tKCY1
VDD = 2.7 to 5.5 V
800
ns
3200
ns
SCK0 high/low level
tKH1,
VDD = 2.7 to 5.5 V
tKCY1/2-50
ns
widths
tKL1
tKCY1/2-150
ns
SI0 setup time
tSIK1
VDD = 2.7 to 5.5 V
150
ns
(on SCK0
↑)
500
ns
SI0 hold time
tKSI1
VDD = 2.7 to 5.5 V
400
ns
(on SCK0
↑)
600
ns
SCK0
↓ → SO0
tKSO1
R = 1k
Ω,VDD = 2.7 to 5.5 V
0
250
ns
Output delay time
C = 100 pFNote
0
1000
ns
Note R and C are the load resistance and load capacitance of the SO0 output line.
(ii) 3-wire serial I/O mode (SCK0 - external clock output)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
SCK0 cycle time
tKCY2
VDD = 2.7 to 5.5 V
800
ns
3200
ns
SCK0 high/low level
tKH2,
VDD = 2.7 to 5.5 V
400
ns
widths
tKL2
1600
ns
SI0 setup time
tSIK2
VDD = 2.7 to 5.5 V
100
ns
(on SCK0
↑)
150
ns
SI0 hold time
tKSI2
VDD = 2.7 to 5.5 V
400
ns
(on SCK0
↑)
600
ns
SCK0
↓ → SO0
tKSO2
R = 1k
Ω,VDD = 2.7 to 5.5 V
0
300
ns
Output delay time
C = 100 pFNote
0
1000
ns
Note R and C are the load resistance and load capacitance of the SO0 output line.
(iii) UART mode (dedicated baud rate generator output)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
Transfer rate
VDD = 2.7 to 5.5 V
78125
bps
19531
bps



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com