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M24C64-RBN3/P 数据表(PDF) 33 Page - STMicroelectronics |
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M24C64-RBN3/P 数据表(HTML) 33 Page - STMicroelectronics |
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33 / 34 page ![]() M24128, M24C64, M24C32 Revision history 33/34 29-Jun-2006 7 Document converted to new ST template. M24C32 and M24C64 products (4.5 to 5.5V supply voltage) removed. M24C64 and M24C32 products (1.7 to 5.5V supply voltage) added. Section 2.1: Chip Enable (E0, E1, E2) and Section 2.2: Write Control (WC) modified, Section 2.3: Supply voltage (VCC) added and replaces Power On Reset: VCC Lock-Out Write Protect section. TA added, Note 1 updated and TLEAD specified for PDIP packages in Table 7: Absolute maximum ratings. ICC0 added, ICC voltage conditions changed and ICC1 specified over the whole voltage range in Table 13: DC characteristics (VCC = 2.5V to 5.5V, device grade 6). ICC0 added, ICC frequency conditions changed and ICC1 specified over the whole voltage range in Table 15: DC characteristics (VCC = 1.8V to 5.5V). tW modified in Table 17: AC characteristics (VCC = 2.5V to 5.5V, device grades 6 and 3). SO8N package specifications updated (see Figure 14 and Table 20). Device grade 5 added, B and P Process letters added to Table 23: Ordering information scheme. Small text changes. 03-Jul-2006 8 ICC1 modified in Table 13: DC characteristics (VCC = 2.5V to 5.5V, device grade 6). Note 1 added to Table 16: DC characteristics (VCC = 1.7V to 5.5V) and table title modified. 17-Oct-2006 9 UFDFPN8 package specifications updated (see Table 22). M24128-BW- and M24128-BR part numbers added. Generic part number corrected in Feature summary on page 1. ICC0 corrected in Table 14 and Table 13. Packages are ECOPACK® compliant. Table 24. Document revision history (continued) Date Revision Changes |
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