ADP1653

Rev. A | Page 14 of 24

2-BIT LOGIC INTERFACE MODE (INTF = 1)

In 2-bit logic interface mode, the two control pins, CTRL1 and

CTRL0, select whether the part is disabled or operating in indicator

LED mode, torch mode, or flash mode, as outlined in Table 7.

Table 7. 2-Bit Logic Interface Mode Selection

INTF = 1

CTRL1

CTRL0

LED Current

Setting Pin

Default Current

(SETx = H)

Disabled

0

0

–

–

ILED

0

1

SETI

ILED = 10 mA

Torch

1

0

SETT

HPLED = 125 mA

Flash

1

1

SETF

HPLED = 500 mA

The LED current levels for indicator LED mode, torch mode,

and flash mode operation are set with separate external resistors

tied between ground and the SETI, SETT, and SETF pins,

respectively. The resulting reference current into each SETx pin

fixed ratio sets the relevant LED current.

Table 8. Reference Current to LED Current Scaling

INTF = 1

CTRL1

CTRL0

LED Current

Disabled

0

0

–

ILED

0

1

Torch

1

0

Flash

1

1

Alternatively, a default internal current setting is used by tying

the SETx pin high. The default current for each mode of operation

approximately equals the current obtained with a 50 kΩ resistor

tied from the SETx pin to ground.

Consequently, the LED current resulting from an external

resistor SETx is given by the following equation:

SETx

DEFAULT

LED

R

I

I

kΩ

50

×

=

(1)

pin high.

(SETI), torch mode (SETT), and flash mode (SETF) operation.

For accurate LED current settings, the minimum SETx resistor

values should be 25 kΩ (SETI, SETT) or 50 kΩ (SETF).

The flash current can be quickly reduced with an external logic

signal (typically 1.8 V logic) by adding a second external resistor

from the SETF pin to the logic signal. Bringing this digital input

from low to high toggles the flash from normal to reduced current

mode by reducing the reference current supplied to the ADP1653

via the SETF pin (see the Applications Information section).

control of LED current, as well as for readback of system status

write mode).

content selects which of the four ADP1653 registers is written

the data from the register denoted by the subaddress. In this

case, the fault register is read (REG3).

The register definitions are shown in Figure 28. The lowest bit

number (0) represents the least significant bit, and the highest

bit number (7) represents the most significant bit.

SUBADDRESS

CHIP ADDRESS

ST 011

0

0

00

0

0

0 SP

0= WRITE

ADP1653 RECEIVES DATA

0

SUBADDRESS

CHIP ADDRESS

CHIP ADDRESS

ST 0

110

0

0

0

0

00000

011

0 ST 0

1

1

0

0

0

0

0

1 SP

1= READ

ADP1653 SENDS DATA

0= WRITE

0

1