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UPD720100AGM-8ED 数据表(PDF) 19 Page - Renesas Technology Corp |
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UPD720100AGM-8ED 数据表(HTML) 19 Page - Renesas Technology Corp |
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19 / 34 page ![]() Data Sheet S15535EJ3V0DS 17 µPD720100A Power Consumption Parameter Symbol Condition TYP. Unit PWD0-0 The power consumption under the state without suspend. Device state = D0, All the ports does not connect to any function. Note 1 168.0 mA The power consumption under the state without suspend. Device state = D0, The number of active ports is 2. Note 2 PWD0-2 Full- or low-speed device(s) is (are) on the port. High-speed device(s) is (are) on the port. 186.2 301.6 mA mA The power consumption under the state without suspend. Device state = D0, The number of active ports is 3. Note 2 PWD0-3 Full- or low-speed device(s) is (are) on the port. High-speed device(s) is (are) on the port. 195.3 368.4 mA mA The power consumption under the state without suspend. Device state = D0, The number of active ports is 4. Note 2 PWD0-4 Full- or low-speed device(s) is (are) on the port. High-speed device(s) is (are) on the port. 204.4 435.2 mA mA The power consumption under the state without suspend. Device state = D0, The number of active ports is 5. Note 2 PWD0-5 Full- or low-speed device(s) is (are) on the port. High-speed device(s) is (are) on the port. 213.5 502.0 mA mA PWD0_S The power consumption under suspend state. Device state = D0, The internal clock is stopped. Note 3 136.2 mA PWD0_C The power consumption under suspend state during PCI clock is stopped by CRUN0. Device state = D0, The internal clock is stopped. Note 3 113.0 mA PWD1 Device state = D1, Analog PLL output is stopped. Note 3, 4 24.7 mA PWD2 Device state = D2, Analog PLL output is stopped. Note 3, 4 10.9 mA PWD3H Device state = D3hot, PIN_EN = High Analog PLL output is stopped. Note 3, 4 10.9 mA Power Consumption PWD3C Device state = D3cold , PIN_EN = Low Oscillator output is stopped. Note 3, 4, 5 650 µA Notes 1. When any device is not connected to all the ports of HC, the power consumption for HC does not depend on the number of active ports. 2. The number of active ports is set by the value of Port No field in PCI configuration space EXT register. 3. For the condition of clock stop, see µPD720100A User’s Manual 7.3 Control for System Clock Operation. 4. When the device state = D1, PCI clock is defined as it is running. When the device state = D2 or D3, PCI clock is defined as it is stopped. 5. If 48 MHz oscillator clock-in is used, power consumption for oscillator block + HC chip will be more than 15 mA. |
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