MPC5565 datasheet(21/48 Pages) FREESCALE

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Electrical Characteristics

MPC5565 Microcontroller Data Sheet, Rev. 0

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

3.11

H7Fa Flash Memory Electrical Characteristics

DNL: 6 MHz ADC Clock

DNL6

–3 4

3 4

Counts

DNL: 12 MHz ADC Clock

DNL12

–6 4

Counts

Offset Error with Calibration

OFFWC

–4 5

4 5

Counts

Full Scale Gain Error with Calibration

GAINWC

–8 6

8 6

Counts

Disruptive Input Injection Current 7, 8, 9, 10

IINJ

–1

Incremental Error due to injection current. All channels have

same 10k

Ω < Rs <100kΩ

Channel under test has Rs=10k

Ω,

IINJ=IINJMAX,IINJMIN

EINJ

–4

Counts

Total Unadjusted Error for single ended conversions with

calibration11, 12, 13, 14, 15

TUE

–4

Counts

1 Conversion characteristics vary with F

ADCLK rate. Reduced conversion accuracy occurs at maximum FADCLK rate. The

maximum value is based on 800KS/s and the minimum value is based on 20MHz oscillator clock frequency divided by a

maximum 16 factor.

2 Stop mode recovery time is the time from the setting of either of the enable bits in the ADC Control Register to the time that

the ADC is ready to perform conversions.

3 At VRH – VRL = 5.12 V, one lsb = 1.25 mV = one count

4 Guaranteed 10-bit monotonicity

5 The absolute value of the offset error without calibration

≤ 100 counts.

6 The absolute value of the full scale gain error without calibration

≤ 120 counts.

7 Below disruptive current conditions, the channel being stressed has conversion values of 0x3FF for analog inputs greater than

VRH and 0x000 for values less than VRL. This assumes that VRH ≤ VDDA and VRL ≥ VSSA due to the presence of the sample

amplifier. Other channels are not affected by non-disruptive conditions.

8 Exceeding limit may cause conversion error on stressed channels and on unstressed channels. Transitions within the limit do

not affect device reliability or cause permanent damage.

9 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate

resistance values using VPOSCLAMP = VDDA + 0.5V and VNEGCLAMP = – 0.3 V, then use the larger of the calculated values.

10 Condition applies to two adjacent pads on the internal pad.

11 The TUE specification will always be better than the sum of the INL, DNL, offset, and gain errors due to canceling errors.

12 TUE does not apply to differential conversions.

13 Measured at 6 MHz ADC clock. TUE with a 12 MHz ADC clock is: –16 counts < TUE < 16 counts.

14 TUE includes all internal device error such as internal reference variation (75% Ref, 25% Ref)

15 Depending on the customer input impedance, the Analog Input Leakage current (DC Electrical specification 35a) may affect

the actual TUE measured on analog channels AN12, AN13, AN14, AN15.

Table 14. Flash Program and Erase Specifications1

Num

Characteristic

Symbol

Min

Typ

Initial

Max2

Max3

Unit

Double Word (64 bits) Program Time4

Tdwprogram

—10

—

500

µs

Page Program Time4

Tpprogram

—22

445

500

µs

16 Kbyte Block Pre-program and Erase Time

T16kpperase

—

265

400

5000

48 Kbyte Block Pre-program and Erase Time

T48kpperase

—

340

400

5000

Table 13. eQADC Conversion Specifications (Operating) (continued)

Num

Characteristic

Symbol

Min

Max

Unit

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