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STR73XF 数据表(PDF) 44 Page - STMicroelectronics

部件名 STR73XF
功能描述  ARM7TDMI 32-bit MCU with Flash, 3x CAN, 4 UARTs, 20 timers, ADC, 12 comm. interfaces
PDF  53 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STR73XF 数据表(HTML) 44 Page - STMicroelectronics

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Electrical parameters
STR73xF
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3.3.6
10-bit ADC characteristics
Subject to general operating conditions for VDDA, fMCLK, and TA unless otherwise specified.
Notes:
1.
Unless otherwise specified, typical data are based on TA=25°C and VDDA-VSS=5.0V. They are given only
as design guidelines and are not tested.
2.
Calibration is recommended once after each power-up.
3.
During the sample time the input capacitance CAIN (6.8 max) can be charged/discharged by the external
source. The internal resistance of the analog source must allow the capacitance to reach its final voltage
level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on
the conversion result. Values for the sample clock tS depend on programming.
1.
ADC Accuracy vs. Negative Injection Current: Injecting negative current on any of the standard (non-
robust) analog input pins should be avoided as this significantly reduces the accuracy of the conversion
being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to
standard analog pins which may potentially inject negative current. The effect of negative injection current
Table 24.
ADC characteristics
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
fADC
0.4
10
MHz
VAIN
Conversion voltage range 2)
VSSA
VDDA
V
Ilkg
Negative input leakage current on
analog pins
VIN<VSS, | IIN |<
400µA on adjacent
analog pin
56
µA
CADC
Internal sample and hold
capacitor
3.5
pF
tCAL
2)
Calibration Time
fADC = 10MHz
580.2
µs
5802
1/fADC
tS
3)
Sampling time
fADC = 10MHz
114
µs
tCONV
Total Conversion time (including
sampling time)
fADC = 10MHz
3µs
30 (10 for sampling
+20 for successive
approximation)
1/fADC
IADC
Running mode
Normal Mode
5
mA
Power-down mode
1
µA
Table 25.
ADC Accuracy with fMCLK = 20MHz, fADC=10MHz, RAIN < 10kΩRAIN,
VDDA=5V. This assumes that the ADC is calibrated
2)
Symbol
Parameter
Conditions
Typ
Max
Unit
|ET|
Total unadjusted error 1)
1.0
2.0
LSB
|EO|
Offset error 1)
0.15
1.0
|EG|
Gain Error 1)
0.97
1.1
|ED|
Differential linearity error1)
0.7
1.0
|EL|
Integral linearity error 1)
0.76
1.5



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