M45PE16 datasheet(44/45 Pages) STMICROELECTRONICS

44 / 45 page

Revision history

M45PE16

44/45

Revision history

Table 18.

Document revision history

Date

Version

Changes

30-Apr-2003

1.0

Document written

04-Jun-2003

1.1

Description corrected of entering Hardware Protected mode (W must be

driven, and cannot be left unconnected).

26-Nov-2003

2.0

VIO(min) extended to –0.6V, and tPW(typ), tPP(typ) improved. tWHSL and

tSHWL added. MLP8 and SO16 pages added, and LGA package

removed. Table of contents, and Pb-free options added

31-Mar-2004

2.1

Document promoted to Product Preview

23-Jul-2004

2.2

SO Connections illustration corrected. Wording clarified for Device Grade

in Ordering Information table

4-Aug-2005

3.0

An easy way to modify data, A fast way to modify data, Page Write (PW)

and Page Program (PP) sections updated to explain optimal use of Page

Write and Page Program instructions. Table 12: AC characteristics

updated.

15-Jun-2006

Document put in new ST template.

tSHQZ end timing line modified in Figure 22: Output timing.

Packages are ECOPACK® compliant. VDFPN and SO16W packages

removed. SO8W and VFQFPN8 packages added (see Section 11:

Package mechanical). Blank option removed below Plating Technology in

Table 17: Ordering information scheme.

Document status promoted to Preliminary data.

16-Oct-2006

50 MHz frequency added, 25 MHz frequency removed.

Figure 3: Bus master and memory devices on the SPI bus modified,

Note 1 modified, Note 2 added. Small text changes.

ICC3 updated in Table 11: DC characteristics.

Table 12: AC characteristics updated.

VIO max modified in Table 7: Absolute maximum ratings.

fR, tPW, tPP, updated in Table 12: AC characteristics.

09-Feb-2007

Section 2.5: Reset (Reset) modified and the signal can no longer be

driven Low to protect the array at a critical time. Section 2.7: VCC supply

voltage and Section 2.8: VSS ground added.

Figure 3: Bus master and memory devices on the SPI bus modified and

explanatory paragraph added.

At power-up The Write In Progress (WIP) bit is reset.

Note modified below Table 10: Capacitance.

Table 13: Reset conditions and Table 14: Timings after a Reset Low pulse

added. Small text changes.

Packages specifications updated (see Section 11: Package mechanical).

M45PE16 数据表(PDF) 44 Page - STMicroelectronics

M45PE16 数据表(HTML) 44 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

数据表下载