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ADFS7124-8BBCPZ 数据表(PDF) 13 Page - Analog Devices |
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ADFS7124-8BBCPZ 数据表(HTML) 13 Page - Analog Devices |
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13 / 93 page ![]() Data Sheet ADFS7124-8 ABSOLUTE MAXIMUM RATINGS analog.com Rev. 0 | 13 of 93 TA = 25°C, unless otherwise noted. Table 4. Absolute Maximum Ratings Parameter Rating AVDD to AVSS −0.3 V to +3.96 V IOVDD to DGND −0.3 V to +3.96 V IOVDD to AVSS −0.3 V to +5.94 V AVSS to DGND −1.98 V to +0.3 V Analog Input Voltage to AVSS −0.3 V to AVDD + 0.3 V Reference Input Voltage to AVSS −0.3 V to AVDD + 0.3 V Digital Input Voltage to DGND −0.3 V to IOVDD + 0.3 V Digital Output Voltage to DGND −0.3 V to IOVDD + 0.3 V AINx/Digital Input Current 10 mA Operating Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Maximum Junction Temperature 150°C Lead Temperature, Soldering Reflow 260°C ESD Ratings Human Body Model (HBM) 4 kV Field-Induced Charged Device Model (FICDM) 1250 V Machine Model 400 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operat- ing conditions for extended periods may affect product reliability. THERMAL RESISTANCE Thermal performance is directly linked to the printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Thermal resistance values specified in Table 5 are calculated based on JEDEC specifications and must be used in compliance with JESD51-12. The worst-case junction temperature is reported. The values in Table 5 are calculated based on the standard JEDEC 2S2P thermal test board in a natural convection test environment. Refer to the JEDEC JESD51 series. Table 5. Thermal Resistance Package Type θJA θJB θJC_TOP Unit 32-Lead LFCSP 40.6 12 17.2 °C/W θJA is the natural convection, junction-to-ambient thermal resistance measured in a one cubic foot sealed enclosure. θJB is the junction-to-board thermal resistance. θJC_TOP is the top junction-to-case thermal resistance. ESD CAUTION ESD (electrostatic discharge) sensitive device. Charged devi- ces and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. |
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