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DS20002035F-page 5

TC1270A/70AN/71A

TIMING DIAGRAMS AND SPECIFICATIONS

MR Pin and Reset Pin Waveform

Device Voltage and Reset Pin (Active Low) Waveform

Reset and Device Reset Timer Requirements

Electrical Characteristics: Unless otherwise noted, VDD = 5V for L/M versions, VDD = 3.3V for T/S versions,

VDD = 3V for R version, TA = –40°C to +125°C. Typical values are at TA = +25°C.

Parameter

Sym

Min

Typ(1)

Max

Units

Test Conditions

V

DD to Reset Delay

tRD

—50

—

µs

VDD = VTRIP(MAX) to

VTRIP(MIN) –125 mV

Reset Active

Time Out

Period

TC127XAxBVyy(3)

tRST

1.09

2.19

4.38

ms

VDD = VTRIP(MAX)

TC127XAxAVyy(3)

17.5

35

70

ms

VDD = VTRIP(MAX)

TC127XAxVyy(3)

140

280

560

ms

VDD = VTRIP(MAX)

MR Minimum Pulse Width

tMR

10

—

—

µs

MR Noise Immunity

tMRNI

—0.1

—

µs

MR to Reset Propagation Delay

tMD

—0.2

—

µs

Note 1: Unless otherwise stated, data in the Typical (“Typ”) column is at 5V, +25

C.

2: RST output for TC1270A, RST output for TC1271A.

3: TC127XA refers to the TC1270A, TC1270AN or TC1271A device.

“x” indicates the selected voltage trip point, while “yy” indicates the package code.

MR

RST

tRST

tMR

RST

tMD

tMRNI

VTRIP(MAX)

VTRIP(MIN)

1V

VDD

VTRIP

tRST

RST(1)

RST

tRST

tRD

VDD < 1V is outside the device operating specification. The RST (or RST) output state is unknown while VDD < 1V.

Note 1: The TC1270AN requires an external pull-up resistor.