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USB5807C 数据表(PDF) 30 Page - Microchip Technology |
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USB5807C 数据表(HTML) 30 Page - Microchip Technology |
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30 / 56 page ![]() USB5807C DS00003182B-page 30 2019 - 2021 Microchip Technology Inc. 8.3 FlexConnect This feature allows the upstream port to be swapped with downstream physical port 1. Only downstream port 1 can be swapped physically. The default state is when port 0 is the upstream port. The ‘flexed” state is when port 1 is the upstream port. FlexConnect can be enabled/disabled in any of the following ways: • SMBus Configuration • Direct Pin Control 8.3.1 SMBUS CONFIGURATION FlexConnect can be controlled via runtime configuration registers through the SMBus Slave Interface during hub run- time (after enumeration). 8.3.2 DIRECT PIN CONTROL The FLEX_CMD control input can be used to control the FlexConnect state. When driven or pulled low, the hub will operate in it’s default state. When driven or pull high, the hub will operate in it’s “flexed” state. The FLEX_STATE output displays the current state of FlexConnect. It operates in the same manner regardless of how FlexConnect is controlled (SMBus or Direct Pin Control). When low, the hub is currently in it’s default state. When high, the hub is in its “flexed” state. 8.4 Resets • Power-On Reset (POR) • External Chip Reset (RESET_N) • USB Bus Reset 8.4.1 POWER-ON RESET (POR) A power-on reset occurs whenever power is initially supplied to the device, or if power is removed and reapplied to the device. A timer within the device will assert the internal reset per the specifications listed in Section 10.6.2, Power-On and Configuration Strap Timing. 8.4.2 EXTERNAL CHIP RESET ( RESET_N) A valid hardware reset is defined as assertion of RESET_N, after all power supplies are within operating range, per the specifications in Section 10.6.3, Reset and Configuration Strap Timing. While reset is asserted, the device (and its asso- ciated external circuitry) enters Standby Mode and consumes minimal current. Assertion of RESET_N causes the following: 1. The PHY is disabled and the differential pairs will be in a high-impedance state. 2. All transactions immediately terminate; no states are saved. 3. All internal registers return to the default state. 4. The external crystal oscillator is halted. 5. The PLL is halted. Note: For additional information, refer to the Microchip USB58xx/USB59xx FlexConnect application note on the Microchip.com USB5807C product page. Note: All power supplies must have reached the operating levels mandated in Section 10.2, Operating Condi- tions**, prior to (or coincident with) the assertion of RESET_N. |
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