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WM8510GEDS/V 数据表(PDF) 44 Page - Wolfson Microelectronics plc |
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WM8510GEDS/V 数据表(HTML) 44 Page - Wolfson Microelectronics plc |
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44 / 81 page ![]() WM8510 Production Data w PD Rev 4.1 December 2006 44 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R49 0 VROI 0 VREF (AVDD/2 or 1.5xAVDD/2) to analogue output resistance 0: approx 1k Ω 1: approx 30 k Ω Table 37 Disabled Outputs to VREF Resistance A dedicated buffer is available for tying off unused analogue I/O pins as shown in Figure 21. This buffer can be enabled using the BUFIOEN register bit. If the SPKBOOST or MONOBOOST bits are set then the relevant outputs will be tied to the output of the DC level shift buffer at 1.5xAVDD/2 when disabled. Table 38 summarises the tie-off options for the speaker and mono output pins. Figure 21 Unused Input/Output Pin Tie-off Buffers MONOEN/ SPKN/PEN MONOBOOST/ SPKBOOST VROI OUTPUT CONFIGURATION 0 0 0 1kΩ tieoff to AVDD/2 0 0 1 30kΩ tieoff to AVDD/2 0 1 0 1kΩ tieoff to 1.5xAVDD/2 0 1 1 30kΩ tieoff to 1.5xAVDD/2 1 0 X Output enabled (DC level=AVDD/2) 1 1 X Output enabled (DC level=1.5xAVDD/2) Table 38 Unused Output Pin Tie-off Options |
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