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WM8746SEDS/R 数据表(PDF) 9 Page - Wolfson Microelectronics plc |
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WM8746SEDS/R 数据表(HTML) 9 Page - Wolfson Microelectronics plc |
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9 / 32 page ![]() WM8746 Production Data w March 2006, PD Rev 4.0 9 DIGITAL CONTROL INTERFACE ML/I2S MC/IWL MD/DM t MLL t DHO t DSU t MLH t MCY t MCH t MCL t SCS LSB t CSS Figure 3 Control Interface Input Timing: 3-Wire Serial Control Mode Test Conditions AVDD = DVDD = 5V, AGND = GR = DGND = 0V, TA = +25 oC, fs = 48kHz, SCKI = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Program Register Input Information MC/IWL rising edge to ML/I2S rising edge tSCS 20 ns MC/IWL pulse cycle time tMCY 80 ns MC/IWL pulse width low tMCL 30 ns MC/IWL pulse width high tMCH 30 ns MD/DM to MC/IWL set-up time tDSU 20 ns MC/IWL to MD/DM hold time tDHO 20 ns ML/I2S pulse width low tMLL 20 ns ML/I2S pulse width high tMLH 20 ns ML/I2S rising to MC/IWL rising tCSS 20 ns Table 3 Control Interface Input Timing Information: 3-Wire Serial Control Mode |
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