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M45PE80 数据表(PDF) 13 Page - STMicroelectronics |
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M45PE80 数据表(HTML) 13 Page - STMicroelectronics |
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13 / 47 page ![]() M45PE80 Operating features 13/47 4.3 A fast way to modify data The Page Program (PP) instruction provides a fast way of modifying data (up to 256 contiguous bytes at a time), provided that it only involves resetting bits to 0 that had previously been set to 1. This might be: ● when the designer is programming the device for the first time ● when the designer knows that the page has already been erased by an earlier Page Erase (PE) or Sector Erase (SE) instruction. This is useful, for example, when storing a fast stream of data, having first performed the erase cycle when time was available ● when the designer knows that the only changes involve resetting bits to 0 that are still set to 1. When this method is possible, it has the additional advantage of minimizing the number of unnecessary erase operations, and the extra stress incurred by each page. For optimized timings, it is recommended to use the Page Program (PP) instruction to program all consecutive targeted bytes in a single sequence versus using several Page Program (PP) sequences with each containing only a few bytes (see Page Program (PP) and Table 14: AC characteristics (50 MHz operation)). 4.4 Polling during a Write, Program or Erase cycle A further improvement in the write, program or erase time can be achieved by not waiting for the worst case delay (tPW, tPP, tPE, or tSE). The Write In Progress (WIP) bit is provided in the Status Register so that the application program can monitor its value, polling it to establish when the previous cycle is complete. 4.5 Reset An internal Power-On Reset circuit helps protect against inadvertent data writes. Addition protection is provided by driving Reset (Reset) Low during the Power-on process, and only driving it High when VCC has reached the correct voltage level, VCC(min). 4.6 Active Power, Stand-by Power and Deep Power-Down modes When Chip Select (S) is Low, the device is enabled, and in the Active Power mode. When Chip Select (S) is High, the device is disabled, but could remain in the Active Power mode until all internal cycles have completed (Program, Erase, Write). The device then goes in to the Stand-by Power mode. The device consumption drops to ICC1. The Deep Power-down mode is entered when the specific instruction (the Enter Deep Power-down Mode (DP) instruction) is executed. The device consumption drops further to ICC2. The device remains in this mode until another specific instruction (the Release from Deep Power-down Mode) is executed. While in the Deep Power-down mode, the device ignores all Write, Program and Erase instructions (see Deep Power-down (DP)). This can be used as an extra software protection mechanism, when the device is not in active use, to protect the device from inadvertent Write, Program or Erase instructions. |
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