M45PE80 datasheet(23/47 Pages) STMICROELECTRONICS

23 / 47 page

M45PE80

Instructions

23/47

6.7

Page Write (PW)

The Page Write (PW) instruction allows bytes to be written in the memory. Before it can be

accepted, a Write Enable (WREN) instruction must previously have been executed. After the

Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch

(WEL).

The Page Write (PW) instruction is entered by driving Chip Select (S) Low, followed by the

instruction code, three address bytes and at least one data byte on Serial Data Input (D).

The rest of the page remains unchanged if no power failure occurs and the device is not

reset during the write cycle.

The Page Write (PW) instruction performs a page erase cycle even if only one byte is

updated.

If the 8 least significant address bits (A7-A0) are not all zero, all transmitted data exceeding

the addressed page boundary roll over, and are written from the start address of the same

page (the one whose 8 least significant address bits (A7-A0) are all zero). Chip Select (S)

must be driven Low for the entire duration of the sequence.

The instruction sequence is shown in Figure 12.

If more than 256 bytes are sent to the device, previously latched data are discarded and the

last 256 data bytes are guaranteed to be written correctly within the same page. If less than

256 Data bytes are sent to device, they are correctly written at the requested addresses

without having any effects on the other bytes of the same page.

For optimized timings, it is recommended to use the Page Write (PW) instruction to write all

consecutive targeted bytes in a single sequence versus using several Page Write (PW)

sequences with each containing only a few bytes (see Table 14: AC characteristics (50 MHz

operation)).

Chip Select (S) must be driven High after the eighth bit of the last data byte has been

latched in, otherwise the Page Write (PW) instruction is not executed.

As soon as Chip Select (S) is driven High, the self-timed Page Write cycle (whose duration

is tPW) is initiated. While the Page Write cycle is in progress, the Status Register may be

read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is

1 during the self-timed Page Write cycle, and is 0 when it is completed. At some unspecified

time before the cycle is complete, the Write Enable Latch (WEL) bit is reset.

A Page Write (PW) instruction applied to a page that is Hardware Protected is not executed.

Any Page Write (PW) instruction, while an Erase, Program or Write cycle is in progress, is

rejected without having any effects on the cycle that is in progress.

M45PE80 数据表(PDF) 23 Page - STMicroelectronics

M45PE80 数据表(HTML) 23 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

数据表下载