AD8319

Rev. A | Page 13 of 20

terms of dBm (decibels referred to 1 mW), in a 50 Ω system is

(7)

For a square wave input signal in a 200 Ω system

6 dBm

Further information on the intercept variation dependence upon

waveform can be found in the AD8313 and AD8307 data sheets.

SETTING THE OUTPUT SLOPE IN

MEASUREMENT MODE

To operate in measurement mode, VOUT must be connected to

VSET. Connecting VOUT directly to VSET yields the nominal

logarithmic slope of −22 mV/dB. The output swing corresponding

to the specified input range is then 0.35 V to 1.5 V. The slope

and output swing can be increased by placing a resistor divider

between VOUT and VSET (that is, one resistor from VOUT to

VSET and one resistor from VSET to ground). The input imped-

ance of VSET is 40 kΩ. Slope-setting resistors should be kept below

20 kΩ to prevent this input impedance from affecting the

resulting slope. If two equal resistors are used (for example,

10 kΩ/10 kΩ), the slope doubles to −44 mV/dB.

VOUT

AD8319

–44mV/dB

VSET

10kΩ

10kΩ

Figure 28. Increasing the Slope

CONTROLLER MODE

The AD8319 provides a controller mode feature at Pin VOUT.

to control subsystems, such as power amplifiers (PAs), variable

gain amplifiers (VGAs), or variable voltage attenuators (VVAs)

that have output power that increases monotonically with

respect to their gain control signal.

To operate in controller mode, the link between VSET and

VOUT is broken. A setpoint voltage is applied to the VSET

input; VOUT is connected to the gain control terminal of the

VGA and the detector’s RF input is connected to the output of

the VGA (usually using a directional coupler and some

additional attenuation). Based on the defined relationship

measurement mode, the AD8319 adjusts the voltage on VOUT

(VOUT is now an error amplifier output) until the level at the

operates in controller mode, there is no defined relationship

results in the correct input signal level appearing at INHI/INLO.

For this output power control loop to be stable, a ground-

referenced capacitor must be connected to the CLPF pin. This

current) to set the loop bandwidth and ensure loop stability.

Further details on control loop dynamics can be found in the

AD8315 data sheet.

RFIN

VGA/VVA

GAIN

CONTROL

VOLTAGE

DIRECTIONAL

COUPLER

ATTENUATOR

INHI

VSET

INLO

CLPF

VOUT

AD8319

52.3Ω

47nF

47nF

DAC

Figure 29. AD8319 Controller Mode

of the VGA must have a positive sense. A positive control

voltage to the VGA increases the gain of the device.

The basic connections for operating the AD8319 in an automatic

gain control (AGC) loop with the ADL5330 are shown in

Figure 30. The ADL5330 is a 10 MHz to 3 GHz variable gain

amplifier. It offers a large gain control range of 60 dB with

±0.5 dB gain stability. This configuration is similar to Figure 29.

The gain of the ADL5330 is controlled by the output pin of the

To avoid overdrive recovery issues, the AD8319 output voltage

can be scaled down using a resistive divider to interface with the

0 V to 1.4 V gain control range of the ADL5330.

A coupler/attenuation of 21 dB is used to match the desired

maximum output power from the VGA to the top end of the

linear operating range of the AD8319 (approximately −5 dBm

at 900 MHz).

INLO

INHI

GAIN

OPLO

OPHI

DIRECTIONAL

COUPLER

ATTENUATOR

VPOS

COMM

ADL5330

+5V

+5V

+5V

COMM

VOUT

VPOS

VSET

INHI

INLO

CLPF

AD8319

LOG AMP

DAC

RF OUTPUT

SIGNAL

4.12kΩ

10kΩ

SETPOINT

VOLTAGE

1nF

47nF

47nF

120nH

120nH

100pF

100pF

100pF

100pF

TADJ

18kΩ

52.3Ω

RF INPUT

SIGNAL

Figure 30. AD8319 Operating in Controller Mode to Provide Automatic Gain

Control Functionality in Combination with the ADL5330