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AD8319ACPZ-R7 数据表(PDF) 14 Page - Analog Devices |
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AD8319ACPZ-R7 数据表(HTML) 14 Page - Analog Devices |
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14 / 20 page ![]() AD8319 Rev. A | Page 14 of 20 Figure 31 shows the transfer function of the output power vs. the VSET voltage over temperature for a 900 MHz sine wave with an input power of −1.5 dBm. Note that the power control of the AD8319 has a negative sense. Decreasing VSET, which corresponds to demanding a higher signal from the ADL5330, increases gain. The AGC loop is capable of controlling signals of ~40 dB. This range limitation is due to the dynamic range of the AD8319. Using a wider dynamic range detector, such as the AD8317, AD8318, or AD8362, allows for the full 60 dB range of the ADL5330 to be used. The performance over temperature is most accurate over the highest power range, where it is gener- ally most critical. Across the top 40 dB range of output power, the linear conformance error is well within ±0.5 dB over temperature. –50 –40 –30 –10 0 10 20 30 –20 –4 –3 0 1 2 3 4 –1 –2 0.2 0.4 0.6 0.8 1.0 1.2 1.4 SETPOINT VOLTAGE (V) 1.3 1.1 0.3 0.5 0.7 0.9 1.5 1.6 Figure 31. ADL5330 Output Power vs. AD8319 Setpoint Voltage, PIN = −1.5 dBm For the AGC loop to remain in equilibrium, the AD8319 must track the envelope of the output signal of the ADL5330 and provide the necessary voltage levels to the gain control input of the ADL5330. Figure 32 shows an oscilloscope screenshot of the AGC loop depicted in Figure 30. A 100 MHz sine wave with 50% AM modulation is applied to the ADL5330. The output signal from the VGA is a constant envelope sine wave with amplitude corresponding to a setpoint voltage at the AD8319 of 1.3 V. Also shown is the gain control response of the AD8319 to the changing input envelope. CH1 200mV A Ch2 1.03V M2.00ms T 0.00000 s 1 Ch2 200mV AM MODULATED INPUT AD8319 OUTPUT Ch3 100mVΩ 2 3 ADL5330 OUTPUT Figure 32. Oscilloscope Screenshot Showing an AM Modulated Input Signal and the Response from the AD8319 Figure 33 shows the response of the AGC RF output to a pulse on VSET. As VSET decreases from 1.5 V to 0.4 V, the AGC loop responds with an RF burst. In this configuration, the input signal to the ADL5330 is a 1 GHz sine wave at a power level of −15 dBm. A Ch1 2.60V T 179.800µs AD8319 VSET PULSE ADL5330 OUTPUT 3 1 M10.µs Ch1 2.00V Ch3 50mVΩ T Figure 33. Oscilloscope Screenshot Showing the Response Time of the AGC Loop Response time and the amount of signal integration are controlled by CFLT. This functionality is analogous to the feedback capacitor around an integrating amplifier. While it is possible to use large capacitors for CFLT, in most applications, values under 1 nF provide sufficient filtering. Calibration in controller mode is similar to the method used in measurement mode. A simple 2-point calibration can be done by applying two known VSET voltages or DAC codes and measuring the output power from the VGA. Slope and intercept can then be calculated by: Slope = (VSET1 − VSET2)/(POUT1 − POUT2) (8) Intercept = POUT1 − VSET1/Slope (9) VSETX = Slope × (POUTX − Intercept) (10) More information on the use of the ADL5330 in AGC applications can be found in the ADL5330 data sheet. |
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