3953_05 datasheet(7/15 Pages) ALLEGRO

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3953

FULL-BRIDGE

PWM MOTOR DRIVER

www.allegromicro.com

During braking, when the MODE input is high, the

peak current limit can be approximated by:

CAUTION: Because the kinetic energy stored in the motor

and load inertia is being converted into current, which

charges the VBB supply bulk capacitance (power supply

output and decoupling capacitance), care must be taken

to ensure the capacitance is sufficient to absorb the

energy without exceeding the voltage rating of any

devices connected to the motor supply.

Brake Operation - MODE Input Low. During braking,

with the MODE input low, the internal current-control

circuitry is disabled. Therefore, care should be taken to

ensure that the motor’s current does not exceed the

ratings of the device. The braking current can be mea-

sured by using an oscilloscope with a current probe

connected to one of the motor’s leads, or if the back-EMF

voltage of the motor is known, approximated by:

RC Fixed Off-Time. The internal PWM current-control

circuitry uses a one shot to control the time the driver(s)

remain(s) off. The one-shot time, tOFF (fixed off-time), is

determined by the selection of an external resistor (RT)

and capacitor (CT) connected in parallel from the RC

timing terminal to ground. The fixed off-time, over a range

of values of CT = 470 pF to 1500 pF and RT = 12 k

Ω to

100 k

Ω, is approximated by:

tOFF

≈ R

T x CT

The operation of the circuit is as follows: when the

PWM latch is reset by the current comparator, the voltage

on the RC terminal will begin to decay from approximately

0.60VCC. When the voltage on the RC terminal reaches

approximately 0.22VCC, the PWM latch is set, thereby

enabling the driver(s).

RC Blanking. In addition to determining the fixed off-time

of the PWM control circuit, the CT component sets the

comparator blanking time. This function blanks the output

of the comparator when the outputs are switched by the

internal current-control circuitry (or by the PHASE,

BRAKE, or ENABLE inputs). The comparator output is

blanked to prevent false over-current detections due to

reverse recovery currents of the clamp diodes, and/or

switching transients related to distributed capacitance in

the load.

During internal PWM operation, at the end of the tOFF

time, the comparator’s output is blanked and CT begins to

be charged from approximately 0.22VCC by an internal

current source of approximately 1 mA. The comparator

output remains blanked until the voltage on CT reaches

approximately 0.60VCC.

When a transition of the PHASE input occurs, CT is

discharged to near ground during the crossover delay

time (the crossover delay time is present to prevent

simultaneous conduction of the source and sink drivers).

After the crossover delay, CT is charged by an internal

current source of approximately 1 mA. The comparator

output remains blanked until the voltage on CT reaches

approximately 0.60VCC.

When the device is disabled, via the ENABLE input,

CT is discharged to near ground. When the device is re-

enabled, CT is charged by an internal current source of

approximately 1 mA. The comparator output remains

blanked until the voltage on CT reaches approximately

0.60VCC.

For 3.3 V operation, the minimum recommended

value for CT is 680 pF

± 5 %. For 5.0 V operation, the

minimum recommended value for CT is 470 pF

± 5%.

These values ensure that the blanking time is sufficient to

avoid false trips of the comparator under normal operating

conditions. For optimal regulation of the load current, the

above values for CT are recommended and the value of

RT can be sized to determine tOFF. For more information

regarding load current regulation, see below.

VREF

ITRIP BRAKE MH

≈

VBEMF – 1V

RLOAD

IPEAK BRAKE ML

≈

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