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SY100S331JC 数据表(PDF) 5 Page - Micrel Semiconductor |
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SY100S331JC 数据表(HTML) 5 Page - Micrel Semiconductor |
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5 / 8 page ![]() 5 SY100S331 Micrel, Inc. M9999-032206 hbwhelp@micrel.com or (408) 955-1690 TIMING DIAGRAMS Propagation Delay (Clock) and Transition Times OUTPUT DATA 20% 80% 50% tPLH tPHL tTLH tTHL 0.7 ± 0.1 ns 0.7 ± 0.1 ns –0.95V –1.69V CLOCK OUTPUT tPHL tPLH 50% 1/fmax tpw (H) Note: VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND OUTPUT SDn, CDn MS, MR 50% tPLH tPHL +0.31V CLOCK OUTPUT tPHL tPLH 50% tpw (H) 20% 80% 50% 0.7 ± 0.1 ns 0.7 ± 0.1 ns +1.05V tS (RELEASE TIME) 20% 80% 50% Propagation Delay (Sets and Resets) |
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