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SY100S331JC 数据表(PDF) 1 Page - Micrel Semiconductor

部件名 SY100S331JC
功能描述  TRIPLE D FLIP-FLOP
PDF  8 Pages
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制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 MICREL - Micrel Semiconductor

SY100S331JC 数据表(HTML) 1 Page - Micrel Semiconductor

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SY100S331
Micrel, Inc.
M9999-032206
hbwhelp@micrel.com or (408) 955-1690
TRIPLE D
FLIP-FLOP
SY100S331
s Max. toggle frequency of 800MHz
s Differential outputs
s IEE min. of –80mA
s Industry standard 100K ECL levels
s Extended supply voltage option:
VEE = –4.2V to –5.5V
s Voltage and temperature compensation for improved
noise immunity
s Internal 75K
input pull-down resistors
s 150% faster than Fairchild
s 40% lower power than Fairchild
s Function and pinout compatible with Fairchild F100K
s Available in 24-pin CERPACK and 28-pin PLCC
packages
FEATURES
DESCRIPTION
The SY100S331 offers three D-type, edge-triggered
master/slave flip-flops with true and complement outputs,
designed for use in high-performance ECL systems. Each
flip-flop is controlled by a common clock (CPc), as well as
its own clock pulse (CPn). The resultant clock signal
controlling the flip-flop is the logical OR operation of these
two clock signals. Data enters the master when both CPc
and CPn are LOW and enters the slave on the rising edge
of either CPc or CPn (or both).
Additional control signals include Master Set (MS) and
Master Reset (MR) inputs. Each flip-flop also has its own
Direct Set (SDn) and Direct Clear (CDn) signals. The MR,
MS, SDn and DCn signals override the clock signals. The
inputs on this device have 75K
Ω pull-down resistors.
Rev.: H
Amendment: /0
Issue Date:
March 2006
BLOCK DIAGRAM
CPC
CP
D
SD
CD
CP2
CD2
D2
SD2
Q2
Q2
CP
D
SD
CD
CP1
CD1
D1
SD1
Q1
Q1
CP
D
SD
CD
CP0
CD0
D0
SD0
Q0
Q0
MS MR
Pin
Function
CP0 – CP2
Individual Clock Inputs
CPc
Common Clock Input
D0 – D2
Data Inputs
CD0 – CD2
Individual Direct Clear Inputs
SDn
Individual Direct Set Inputs
MR
Master Reset Input
MS
Master Set Input
Q0 – Q2
Data Outputs
Q0 – Q2
Complementary Data Outputs
VEES
VEE Substrate
VCCA
VCCO for ECL Outputs
PIN NAMES


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