SC1933C datasheet(8/28 Pages) POWERINT

8 / 28 page

Rev. C 11/18

SC1933C/SC1936C

www.power.com

Output Constant Current and Constant Power Regulation

The SC1933C/SC1936C regulates the output current through an

external current sense resistor between the ISENSE and SECONDARY

GROUND pins and also controls output power in conjunction with the

output voltage sensed on the OUTPUT VOLTAGE pin. If constant

current regulation is not required, the ISENSE pin must be tied to the

SECONDARY GROUND pin. The SC1933C/SC1936C has constant

current regulation below the V

PK threshold, and a constant output

power profile above the V

PK threshold. The transition between CP

and CC is set by the V

PK threshold and the set constant current is

programmed by the resistor between the ISENSE and SECONDARY

GROUND pins.

SR Disable Protection

In each cycle SR is only engaged if a set cycle was requested by the

secondary controller and the negative edge is detected on the

FORWARD pin. In the event that the voltage on the ISENSE pin

exceeds approximately 3 times the CC threshold, the SR FET drive is

disabled until the surge current has diminished to nominal levels.

SR Static Pull-Down

To ensure that the SR gate is held low when the secondary is not in

control, the SYNCHRONOUS RECTIFIER DRIVE pin has a nominally

“ON” device to pull the pin low and reduce any voltage on the SR gate

due to capacitive coupling from the FORWARD pin.

Open SR Protection

In order to protect against an open SYNCHRONOUS RECTIFIER

DRIVE pin system fault the secondary controller has a protection

mode to ensure the SYNCHRONOUS RECTIFIER DRIVE pin is

connected to an external FET. If the external capacitance on the

SYNCHRONOUS RECTIFIER DRIVE pin is below 100 pF, the device

will assume the SYNCHRONOUS RECTIFIER DRIVE pin is “open” and

there is no FET to drive. If the pin capacitance detected is above

100 pF, the controller will assume an SR FET is connected.

In the event the SYNCHRONOUS RECTIFIER DRIVE pin is detected to

be open, the secondary controller will stop requesting pulses from

the primary to initiate auto-restart.

If the SYNCHRONOUS RECTIFIER DRIVE pin is tied to ground at

start-up, the SR drive function is disabled and the open

SYNCHRONOUS RECTIFIER DRIVE pin protection mode is also

disabled.

Intelligent Quasi-Resonant Mode Switching

In order to improve conversion efficiency and reduce switching

losses, the SC1933C/SC1936C features a means to force switching

when the voltage across the primary switch is near its minimum

voltage when the converter operates in discontinuous conduction

mode (DCM). This mode of operation is automatically engaged in

DCM and disabled once the converter moves to continuous-

conduction mode (CCM).

Rather than detecting the magnetizing ring valley on the primary-

side, the peak voltage of the FORWARD pin voltage as it rises above

the output voltage level is used to gate secondary requests to initiate

the switch “ON” cycle in the primary controller.

The secondary controller detects when the controller enters in

discontinuous-mode and opens secondary cycle request windows

corresponding to minimum switching voltage across the primary

power switch.

Quasi-Resonant (QR) mode is enabled for 20 ms after DCM is detected

or when ring amplitude (pk-pk) >2 V. Afterwards, QR switching is

disabled, at which point switching may occur at any time a secondary

request is initiated.

The secondary controller includes blanking of ~1 ms to prevent false

detection of primary “ON” cycle when the FORWARD pin rings below

ground. See Figure 10.

SC1933C 数据表(PDF) 8 Page - Power Integrations, Inc.

SC1933C 数据表(HTML) 8 Page - Power Integrations, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载