Sabre32 Reference Datasheet

CONFIDENTIAL ADVANCE

INFORMATION Rev. 1.2

February 11, 2010

www.esstech.com

10

Vista™

High Definition

Vista™

High Definition

FEATURE DESCRIPTION

Soft Mute

When Mute is asserted the output signal will ramp to the -

∞ level. When Mute is reset the attenuation

level will ramp back up to the previous level set by the volume control register. Asserting Mute will not

change the value of the volume control register. The ramp rate is 0.0078125*FS dB/s, where FS =

DATA_CLK/64 in PCM serial or DSD modes, or SPDIF sampling rate in SPDIF mode.

Automute Loopback

During an automute condition the external automute pin will always be asserted, however the ramping of

the volume of each DAC DAC to -

∞ can now be programmatically enabled or disabled.

Zero Detect

The use of the zero detect function to drive an external mute circuit is not required, but is recommended

for designs that need the absolute maximum signal-to-noise ratios on an idle channel.

o

In PCM serial mode, the Zero Detect output pin “AUTOMUTE” will become active once the audio data

is continuously below the threshold set by <Register Automute_lev>, for a length of time defined by

2096896/(<Register#9>*DATA_CLK) Seconds.

o

In SPDIF mode, the Zero Detect output pin “AUTOMUTE” will become active once the audio data is

continuously below the threshold set by <Register Automute_lev>, for a length of time defined by

2096896/(<Register#9>*(64*FS) Seconds, where FS is the SPDIF sampling rate.

o

In the DSD Mode, the Zero Detect output pin “AUTOMUTE” will become active when any 8

consecutive values in the DSD stream have as many 1’s and 0’s for a length of time defined by

2096896/(<Register Automute_time>*DATA_CLK) Seconds. The following table summarizes the

conditions.

Mode

Detection Condition

Time

PCM

Data is continuously lower than

<Register Automute_lev >

2096896/(<Register Automute_time >*DATA_CLK)

SPDIF

Data is continuously lower than

<Register Automute_lev >

2096896/(<Register Automute_time >*(64*FS))

where FS is the SPDIF sampling rate

DSD

Equal number of 1s and 0s in every 8

bits of data

2096896/(<Register Automute_time >*DATA_CLK)

Table5

Volume Control

Each output channel has its own attenuation circuit. The attenuation for each channel is controlled

independently. Each channel can be attenuated from 0dB to –127dB in 0.5dB steps.

Each 0.5dB step transition takes 64 intermediate levels. The result being that the level changes are done

using small enough steps so that no switching noise occurs during the transition of the volume control.

When a new volume level is set, the attenuation circuit will ramp softly to the new level.

Master Trim

The master trim sets the 0dB reference level for the volume control of each DAC. The master trim is

programmable via registers 20-23 and is a 32bit signed number. Therefore it should never exceed

32'h7FFFFFFF (as this is full-scale signed).

All Mono Mode

The SABRE32can be put into an all mono mode where all eight DACs are driven from the same source.

This can be useful for high-end audio applications. The source data for all eight DACs can be

programmatically configured to be either PCM CH1 or CH2.