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VC0736 数据表(PDF) 39 Page - NEXTCHIP Co,Ltd |
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VC0736 数据表(HTML) 39 Page - NEXTCHIP Co,Ltd |
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39 / 127 page ![]() NVP6124 Data sheet 02.11.2015 (REV 0.2) 37/125 4-CH AHD2.0 RX and 9-CH Audio Codec 5. I2C Interface I2C interface requires 2 wires, SCL (I2C clock) & SDA (I2C R/W data). NVP6124 provides special device ID as slave addresses (SA0, SA1). So any combination of 7 bit can be defined as slave address of NVP6124. The Figure 5.1 shows read/write protocol of I2C interface. The 1st byte transfers slave address and read/write information. For write mode, the 2nd byte transfers base register index and the 3rd byte transfers date to be written. For read mode, reading data is transferred during 2nd byte period. The brief I2C interface protocol is shown in Figure 5.2. Figure 5.1. I2C Timing Diagram Figure 5.2. I2C Slave Address Configuration |
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