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AM29LV641DL121REF 数据表(PDF) 41 Page - Advanced Micro Devices |
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AM29LV641DL121REF 数据表(HTML) 41 Page - Advanced Micro Devices |
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41 / 57 page ![]() January 22, 2007 22366C6 Am29LV640D/Am29LV641D 39 D A TA SH EE T AC CHARACTERISTICS Erase and Program Operations Notes: 1. Not 100% tested. 2. See the “Erase And Programming Performance” section for more information. Parameter Speed Options JEDEC Std. Description 90R 120R, 121R Unit tAVAV tWC Write Cycle Time (Note 1)Min 90 120 ns tAVWL tAS Address Setup Time Min 0 ns tASO Address Setup Time to OE# low during toggle bit polling Min 15 ns tWLAX tAH Address Hold Time Min 45 50 ns tAHT Address Hold Time From CE# or OE# high during toggle bit polling Min 0 ns t DVWH t DS Data Setup Time Min 45 50 ns t WHDX t DH Data Hold Time Min 0 ns t OEPH Output Enable High during toggle bit polling Min 20 ns tGHWL tGHWL Read Recovery Time Before Write (OE# High to WE# Low) Min 0 ns tELWL tCS CE# Setup Time Min 0 ns tWHEH tCH CE# Hold Time Min 0 ns tWLWH tWP Write Pulse Width Min 35 50 ns tWHDL tWPH Write Pulse Width High Min 30 ns tWHWH1 tWHWH1 Word Programming Operation (Note 2)Typ 11 µs tWHWH1 tWHWH1 Accelerated Word Programming Operation (Note 2) Typ 7 µs tWHWH2 tWHWH2 Sector Erase Operation (Note 2) Typ 0.9 sec tVHH VHH Rise and Fall Time (Note 1)Min 250 ns tVCS VCC Setup Time (Note 1)Min 50 µs tRB Write Recovery Time from RY/BY# Min 0 ns tBUSY Program/Erase Valid to RY/BY# Delay Max 90 ns |
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