数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

L160DB90VC 数据表(PDF) 13 Page - Advanced Micro Devices

部件名 L160DB90VC
功能描述  16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
PDF  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

L160DB90VC 数据表(HTML) 13 Page - Advanced Micro Devices

Back Button L160DB90VC Datasheet HTML 9Page - Advanced Micro Devices L160DB90VC Datasheet HTML 10Page - Advanced Micro Devices L160DB90VC Datasheet HTML 11Page - Advanced Micro Devices L160DB90VC Datasheet HTML 12Page - Advanced Micro Devices L160DB90VC Datasheet HTML 13Page - Advanced Micro Devices L160DB90VC Datasheet HTML 14Page - Advanced Micro Devices L160DB90VC Datasheet HTML 15Page - Advanced Micro Devices L160DB90VC Datasheet HTML 16Page - Advanced Micro Devices L160DB90VC Datasheet HTML 17Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 52 page
background image
22358B7 May 5, 2006
Am29LV160D
11
DA TA
SH EET
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the
system drives the RESET# pin to VIL for at least a pe-
riod of tRP, the device immediately terminates any
operation in progress, tristates all data output pins,
and ignores all read/write attempts for the duration of
the RESET# pulse. The device also resets the internal
state machine to reading array data. The operation
that was interrupted should be reinitiated once the de-
vice is ready to accept another command sequence,
to ensure data integrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at VSS±0.3 V, the device
draws CMOS standby current (ICC4). If RESET# is
held at VIL but not within VSS±0.3 V, the standby cur-
rent will be greater.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a “0” (busy) until the
internal reset operation is complete, which requires a
time of tREADY (during Embedded Algorithms). The
system can thus monitor RY/BY# to deter mine
whether the reset operation is complete. If RESET#
is asserted when a program or erase operation is not
executing (RY/BY# pin is “1”), the reset operation is
completed within a time of tREADY (not during Embed-
ded Algorithms). The system can read data tRH after
the RESET# pin returns to VIH.
Refer to the AC Characteristics tables for RESET# pa-
rameters and to Figure 14 for the timing diagram.
Output Disable Mode
When the OE# input is at VIH, output from the device is
disabled. The output pins are placed in the high im-
pedance state.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com