4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs

Datasheet

Revision 1.91 (10-13-06)

16

SMSC USB2227/USB2228

DATASHEET

XTAL1/

CLKIN

102

A51

ICLKx

Crystal Input/External Clock Input:

24Mhz Crystal or external clock input.

This pin can be connected to one terminal of the crystal

or can be connected to an external 24Mhz clock when

a crystal is not used.

Note:

The ‘MA[2:0] pins will be sampled while

nRESET is asserted, and the value will be

latched upon nRESET negation. This will

determine the clock source and value.

XTAL2

103

B49

OCLKx

Crystal Output:

24Mhz Crystal

This is the other terminal of the crystal, or left open when

an external clock source is used to drive XTAL1/CLKIN.

It may not be used to drive any external circuitry other

than the crystal circuit.

MEMORY/IO INTERFACE

MD[7:0]

12

11

10

9

8

7

6

5

B6

A6

B5

A5

A4

B4

A3

B3

I/O8PU

Memory Data Bus:

When ROMEN bit of GPIO_IN1 register = 0, these

signals are used to transfer data between the internal

CPU and the external program memory.

These pins have internally controlled weak pull-up

resistors.

MA[15:3]

4

2

1

128

127

126

125

124

123

122

121

120

119

A2

A1

B1

B60

A64

B59

A63

B58

A62

B57

A61

A60

B56

O8

Memory Address Bus:

These signals address memory locations within the

external memory.

SYMBOL

128-PIN

VTQFP

124-PIN

DQFN

BUFFER

TYPE

DESCRIPTION