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NE567D 数据表(PDF) 7 Page - NXP Semiconductors |
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NE567D 数据表(HTML) 7 Page - NXP Semiconductors |
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7 / 13 page ![]() Philips Semiconductors Linear Products Product specification NE/SE567 Tone decoder/phase-locked loop April 15, 1992 409 TYPICAL RESPONSE Response to 100mVRMS Tone Burst Response to Same Input Tone Burst With Wideband Noise INPUT OUTPUT OUTPUT INPUT NOTES: NOTE: RL = 100Ω S/N = –6dB Noise Bandwidth = 140Hz RL = 100Ω 3. The value of C3 is generally non-critical. C3 sets the band edge of a low-pass filter which attenuates frequencies outside the detection band to eliminate spurious outputs. If C3 is too small, frequencies just outside the detection band will switch the output stage on and off at the beat frequency, or the output may pulse on and off during the turn-on transient. If C3 is too large, turn-on and turn-off of the Figure 1. INPUT 3 5 6 2 7 1 8 4 +V +V OUTPUT FILTER LOW PASS FILTER 567 R1 RL R2 C3 C2 C1 f O + 1 R 1 C 1 output stage will be delayed until the voltage on C3 passes the threshold voltage. (Such delay may be desirable to avoid spurious outputs due to transient frequencies.) A typical minimum value for C3 is 2C2. 4. Optional resistor R2 sets the threshold for the largest “no output” input voltage. A value of 130k Ω is used to assure the tested limit of 10mVRMS min. This resistor can be referenced to ground for increased sensitivity. The explanation can be found in the “optional controls” section which follows. AVAILABLE OUTPUTS (Figure 1) The primary output is the uncommitted output transistor collector, Pin 8. When an in-band input signal is present, this transistor saturates; its collector voltage being less than 1.0 volt (typically 0.6V) at full output current (100mA). The voltage at Pin 2 is the phase detector output which is a linear function of frequency over the range of 0.95 to 1.05 fO with a slope of about 20mV per percent of frequency deviation. The average voltage at Pin 1 is, during lock, a function of the in-band input amplitude in accordance with the transfer characteristic given. Pin 5 is the controlled oscillator square wave output of magnitude (+V -2VBE)≅(+V-1.4V) having a DC average of +V/2. A 1k Ω load may be driven from pin 5. Pin 6 is an exponential triangle of 1VP-P with an average DC level of +V/2. Only high impedance loads may be Figure 2. Typical Output Response THRESHOLD VOLTAGE VREF 4.0 3.5 3.0 2.5 0 100 200mVrms IN-BAND INPUT VOLTAGE PIN 1 VOLTAGE (AVG) f1 = fO 7% BW VCE (SAT) < 1.0V 14% V+ 0 3.9V 3.8V 3.7V 1.1fO fO 0.9fO LOW PASS FILTER (PIN 2) OUTPUT (PIN 8) |
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